Revision 1.2
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Instruction Set (
Continued
)
G
Table 7-29. FPU Instruction Set Summary
FPU Instruction
Opcode
Operation
Clock
Count
Issue
F2XM1
Function Evaluation 2
x
-1
D9 F0
TOS <--- 2
TOS
-1
92 - 108
2
FABS
Floating Absolute Value
D9 E1
TOS <--- | TOS |
2
2
FADD
Floating Point Add
Top of Stack
DC [1100 0 n]
ST(n) <--- ST(n) + TOS
4 - 9
80-bit Register
D8 [1100 0 n]
TOS <--- TOS + ST(n)
4 - 9
64-bit Real
DC [mod 000 r/m]
TOS <--- TOS + M.DR
4 - 9
32-bit Real
D8 [mod 000 r/m]
TOS <--- TOS + M.SR
4 - 9
FADDP
Floating Point Add, Pop
DE [1100 0 n]
ST(n) <--- ST(n) + TOS; then pop TOS
FIADD
Floating Point Integer Add
32-bit integer
DA [mod 000 r/m]
TOS <--- TOS + M.SI
8 - 14
16-bit integer
DE [mod 000 r/m]
TOS <--- TOS + M.WI
8 - 14
FCHS
Floating Change Sign
D9 E0
TOS <--- - TOS
2
FCLEX
Clear Exceptions
(9B) DB E2
Wait then Clear Exceptions
5
FNCLEX
Clear Exceptions
DB E2
Clear Exceptions
3
FCMOVB
Floating Point Conditional Move if
Below
DA [1100 0 n]
If (CF=1) ST(0) <--- ST(n)
4
FCMOVE
Floating Point Conditional Move if
Equal
DA [1100 1 n]
If (ZF=1) ST(0) <--- ST(n)
4
FCMOVBE
Floating Point Conditional Move if
Below or Equal
DA [1101 0 n]
If (CF=1 or ZF=1) ST(0) <--- ST(n)
4
FCMOVU
Floating Point Conditional Move if
Unordered
DA [1101 1 n]
If (PF=1) ST(0) <--- ST(n)
4
FCMOVNB
Floating Point Conditional Move if
Not Below
DB [1100 0 n]
If (CF=0) ST(0) <--- ST(n)
4
FCMOVNE
Floating Point Conditional Move if
Not Equal
DB [1100 1 n]
If (ZF=0) ST(0) <--- ST(n)
4
FCMOVNBE
Floating Point Conditional Move if
Not Below or Equal
DB [1101 0 n]
If (CF=0 and ZF=0) ST(0) <--- ST(n)
4
FCMOVNU
Floating Point Conditional Move if
Not Unordered
DB [1101 1 n]
If (DF=0) ST(0) <--- ST(n)
4
FCOM
Floating Point Compare
80-bit Register
D8 [1101 0 n]
CC set by TOS - ST(n)
4
64-bit Real
DC [mod 010 r/m]
CC set by TOS - M.DR
4
32-bit Real
D8 [mod 010 r/m]
CC set by TOS - M.SR
4
FCOMP
Floating Point Compare, Pop
80-bit Register
D8 [1101 1 n]
CC set by TOS - ST(n); then pop TOS
4
64-bit Real
DC [mod 011 r/m]
CC set by TOS - M.DR; then pop TOS
4
32-bit Real
D8 [mod 011 r/m]
CC set by TOS - M.SR; then pop TOS
4
FCOMPP
Floating Point Compare, Pop
Two Stack Elements
DE D9
CC set by TOS - ST(1); then pop TOS and
ST(1)
4
FCOMI
Floating Point Compare Real and Set EFLAGS
80-bit Register
DB [1111 0 n]
EFLAG set by TOS - ST(n)
4
FCOMIP
Floating Point Compare Real and Set EFLAGS, Pop
80-bit Register
DF [1111 0 n]
EFLAG set by TOS - ST(n); then pop TOS
4
FUCOMI
Floating Point Unordered Compare Real and Set EFLAGS
80-bit Integer
DB [1110 1 n]
EFLAG set by TOS - ST(n)
9 - 10
FUCOMIP
Floating Point Unordered Compare Real and Set EFLAGS, Pop
80-bit Integer
DF [1110 1 n]
EFLAG set by TOS - ST(n); then pop TOS
9 - 10
FICOM
Floating Point Integer Compare
32-bit integer
DA [mod 010 r/m]
CC set by TOS - M.WI
9 - 10
16-bit integer
DE [mod 010 r/m]
CC set by TOS - M.SI
9 - 10
FICOMP
Floating Point Integer Compare, Pop
32-bit integer
DA [mod 011 r/m]
CC set by TOS - M.WI; then pop TOS
9 - 10
16-bit integer
DE [mod 011 r/m
CC set by TOS - M.SI; then pop TOS
9 - 10