Revision 1.2
21
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Signal Definitions (
Continued
)
G
Figure 2-2. 352 BGA Pin Assignment Diagram
For order information, refer to Section A.1 “Order Information” on page 246.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
Index Corner
VSS
VSS
AD27
AD24
AD21
AD16
VCC2 FRAM# DEVS# VCC3 PERR# AD15
VSS
AD11
CBE0#
AD6
VCC2
AD4
AD2
VCC3
AD0
AD1
TEST2
MD2
VSS
VSS
VSS
VSS
AD28
AD25
AD22
AD18
VCC2
CBE2# TRDY# VCC3 LOCK#
PAR
AD14
AD12
AD9
AD7
VCC2
INTR
AD3
VCC3
TEST1 TEST3
MD1
MD33
VSS
VSS
AD29
AD31
AD30
AD26
AD23
AD19
VCC2
AD17
IRDY#
VCC3 STOP# SERR# CBE1#
AD13
AD10
AD8
VCC2
AD5
SMI#
VCC3
TEST0 IRQ13
MD32
MD34
MD3
MD35
GNT0#
TDI
REQ2#
VSS
CBE3#
VSS
VCC2
VSS
VSS
VCC3
VSS
VSS
VSS
VSS
VSS
VSS
VCC2
VSS
VSS
VCC3
VSS
MD0
VSS
MD4
MD36
NC
GNT2# SUSPA# REQ0# AD20
MD6
NC
MD5
MD37
TD0
GNT1# TEST
VSS
VSS
MD38
MD7
MD39
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
TMS
SUSP# REQ1#
VSS
VSS
MD8
MD40
MD9
FPVSY
TCLK
RESET
VSS
VSS
MD41
MD10
MD42
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
CKM1 FPHSY SERLP
VSS
VSS
MD11
MD43
MD12
CKM2 VIDVAL CKM0
VSS
VSS
MD44
MD13
MD45
VSS
PIX1
PIX0
VSS
VSS
MD14
MD46
MD15
VIDCLK
PIX3
PIX2
VSS
VSS
MD47 CASA# SYSCLK
PIX4
PIX5
PIX6
VSS
VSS
WEB# WEA# CASB#
PIX7
PIX8
PIX9
VSS
VSS
DQM0
DQM4
DQM1
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
PIX10
PIX11
PIX12
VSS
VSS
DQM5
CS2#
CS0#
PIX13 CRTHSY PIX14
VSS
VSS
RASA# RASB#
MA0
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
VCC2
PIX15
PIX16 CRTVSY
VSS
VSS
MA1
MA2
MA3
DCLK
PIX17
VDAT6 VDAT7
MA4
MA5
MA6
MA7
PCLK
FLT#
VDAT4
VSS
NC
VSS
VCC2
VSS
VSS
VCC3
VSS
VSS
VSS
VSS
VSS
VSS
VCC2
VSS
VSS
VCC3
VSS
DQM6
VSS
MA8
MA9
MA10
VRDY
VDAT5 VDAT3 VDAT0 EDISP
MD63
VCC2
MD62
MD29
VCC3
MD59
MD26
MD56
MD55
MD22
CKEB
VCC2
MD51
MD18
VCC3
MD48
DQM3
CS1#
MA11
BA0
BA1
VSS
VSS
VDAT2 SCLK3 SCLK1 RWCLK VCC2
SCKIN
MD61
VCC3
MD28
MD58
MD25
MD24
MD54
MD21
VCC2
MD20
MD50
VCC3
MD17
DQM7
CS3#
MA12
VSS
VSS
VSS
VSS
VDAT1 SCLK0 SCLK2
MD31
VCC2 SCKOUT MD30
VCC3
MD60
MD27
MD57
VSS
MD23
MD53
VCC2
MD52
MD19
VCC3
MD49
MD16
DQM2
CKEA
VSS
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
352 BGA - Top View
Note:
Signal names have been abbreviated in this figure due to space constraints.
= GND terminal
= PWR terminal (VCC2 = VCC_CORE; VCC3 = VCC_IO)
GXLV
Processor
Geode