Model-Specific Registers (MSRs)
25
21329L/0—December 1999
AMD-K6
Processor BIOS Design
Write Allocate Enable Limit.
The WAELIM field is 10 bits wide. This
field, multiplied by 4 Mbytes, defines an upper memory limit.
Any pending write cycle that misses the L1 cache and that
addresses memory below this limit causes the processor to
perform a write allocate (assuming the address is not within a
range where write allocates are disallowed). Write allocate is
disabled for memory accesses at and above this limit unless the
processor determines a pending write cycle is cacheable by
means of one of the other write allocate mechanisms—“Write
to a Cacheable Page” and “Write to a Sector” (for more
information, see the “Cache Organization” chapter in the
AMD-K6
-2
Processor Data Sheet
, order# 21850 or the
AMD-K6
-III
Processor Data Sheet
, order# 21918). The maximum
value of this limit is ((2
10
–1) · 4 Mbytes) = 4092 Mbytes. When
all the bits in this field are set to 0, all memory is above this
limit and the write allocate mechanism is disabled (even if all
bits in the WAELIM field are set to 0, write allocates can still
occur due to the “Write to a Cacheable Page” and “Write to a
Sector” mechanisms).
Once the BIOS determines the amount of RAM installed in the
system, this number should also be used to program the
WAELIM field. For example, a system with 32 Mbytes of RAM
would program the WAELIM field with the value
00_0000_1000b. This value (8), when multiplied by 4 Mbytes,
yields 32 Mbytes as the write allocate limit.
Write Allocate Enable 15-to-16-Mbyte.
The WAE15M bit is used to
enable write allocations for the memory write cycles that
address the 1 Mbyte of memory between 15 Mbytes and 16
Mbytes. This bit must be set to 1 to allow write allocates in this
memory area. This sub-mechanism of the WAELIM provides a
memory hole to prevent write allocates. This memory hole is
provided to account for a small number of uncommon
memory-mapped I/O adapters that use this particular memory
address space. If the system contains one of these peripherals,
the bit should be set to 0 (even if the WAE15M bit is set to 0,
write allocates can still occur between 15 Mbytes and 16
Mbytes due to the “Write to a Cacheable Page” and “Write to a
Sector” mechanisms). The WAE15M bit is ignored if the value
in the WAELIM field is set to less than 16 Mbytes.
By definition, write allocations are not performed in the
memory area between 640 Kbytes and 1 Mbyte unless the
processor determines a pending write cycle is cacheable by