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參數(shù)資料
| 型號： | 21329 |
| 英文描述： | AMD-K6 Processor Power Supply Design Application Note AMD-K6 Processor Bios Design Application Note |
| 中文描述： | 的AMD - K6處理器電源設計應用指南的AMD - K6處理器的BIOS設計中的應用說明 |
| 文件頁數(shù)： | 24/52頁 |
| 文件大小： | 687K |
| 代理商： | 21329 |
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14
Model-Specific Registers (MSRs)
AMD-K6
Processor BIOS Design
21329L/0—December 1999
Model-Specific Registers (MSRs)
All models and steppings of the AMD-K6 processor family
support the following four standard MSRs, and the bits and
fields within each of these MSRs are defined identically:
Machine-Check Address Register (MCAR)—ECX = 00h
Machine-Check Type Register (MCTR)—ECX = 01h
Test Register 12 (TR12)—ECX = 0Eh
Time Stamp Counter (TSC)—ECX = 10h
I
I
I
I
All models and steppings of the AMD-K6 processor family also
support the following two MSRs, but the fields within each of
these MSRs are defined differently as shown in Table 6 (an ‘X’
indicates support for a register or field):
I
Extended Feature Enable Register
(EFER)—ECX = C000_0080h
Write Handling Control Register
(WHCR)—ECX = C000_0082h
I
Table 6.
Summary of MSR Differences Within the AMD-K6
Family
Model
Stepping
Standard
1
MSRs
X
X
X
X
X
EFER
2
WHCR
3
UWCCR
PSOR
PFIR
L2AAR
L2D EWBEC DPE SCE 508 MB 4092 MB
X
X
X
X
X
X
X
X
X
X
6
7
8
8
9
All
All
7:0
F:8
All
X
X
X
X
X
X
X
X
X
X
X
X
Notes:
1. There are four M
SRs that every model and stepping of the AMD-K6 family of processors support identically—MCAR, MCTR, TR12,
and TSC.
2. L2D, EWBEC, and DPE are bits/fields supported in EFER for the indicated models/steppings. All models/steppings support the
System Call Extension (SCE) bit in EFER, even if the corresponding SYSCALL and SYSRET instructions and the STAR register are
not supported.
3. Indicates whether the WAELIM field supports 508 Mbytes or 4092 Mbytes of memory. The location of the WAE15M bit and the
WAELIM field within the WHCR register differs between the models/steppings that support 508 Mbytes of memory and those that
support 4092 Mbytes of memory.
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