XRT73L02
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.1.0
á
PRELIMINARY
54
Bit D3 - STS-1/(DS3_(n)) - Channel (n) - Mode Se-
lect
This Read/Write bit field is used to configure Channel
(n) to operate in either the SONET STS-1 Mode or
the DS3 Mode.
Writing a "0" into this bit-field configures Channel (n)
to operate in the DS3 Mode. Writing a "1" into this
bit-field configures Channel (n) to operate in the SO-
NET STS-1 Mode.
N
OTE
:
This bit-field is ignored if the E3_Ch_(n) bit-field
(e.g., D2 in this Command Register) is set to "1".
Bit D2 - E3 Mode Select - Channel (n)
This Read/Write bit-field is used to configure Channel
(n) to operate in the E3 Mode.
Writing a "0" into this bit-field configures Channel (n)
to operate in either the DS3 or SONET STS-1 Mode
as specified by the setting of the DS3 bit-field in this
Command Register. Writing a "1" into this bit-field
configures Channel (n) to operate in the E3 Mode.
Bit D1 - LLB_(n) (Local Loop-Back - Channel (n))
This Read/Write bit-field along with RLB_(n) is used
to configure Channel (n) to operate in any one of a
variety of Loop-Back modes.
Table 8 relates the contents of LLB_(n) and RLB_(n)
and the corresponding Loop-Back mode for Channel
(n).
Bit D0 - RLB_(n) (Remote Loop-Back - Channel
(n))
This Read/Write bit-field along with LLB_(n) is used
to configure Channel (n) to operate in any one of a
variety of Loop-Back modes.
Table 8 relates the contents of LLB_(n) and RLB_(n)
and the corresponding Loop-Back mode for Channel
(n).
5.3
O
PERATING
THE
M
ICROPROCESSOR
S
ERIAL
I
NTERFACE
.
The XRT73L02 Serial Interface is a simple four wire
interface that is compatible with many of the micro-
controllers available in the market. This interface
consists of the following signals:
CS - Chip Select (Active Low)
SClk - Serial Clock
SDI - Serial Data Input
SDO - Serial Data Output
Using the Microprocessor Serial Interface
The following instructions for using the Microproces-
sor Serial Interface are best understood by referring
to the diagram in Figure 31 and the timing diagram in
Figure 32.
In order to use the Microprocessor Serial Interface, a
clock signal must be first applied to the SClk input pin.
Then, initiate a Read or Write operation by asserting
the active-low Chip Select input pin CS. It is impor-
tant to assert the CS pin (e.g., toggle it “Low") at least
50ns prior to the very first rising edge of the clock sig-
nal.
Once the CS input pin has been asserted, the type of
operation and the target register address must now
be specified. Provide this information to the Micro-
processor Serial Interface by writing eight serial bits
of data into the SDI input.
N
OTE
:
Each of these bits is clocked into the SDI input on
the rising edge of SClk.
Bit 1- R/W (Read/Write) Bit
This bit is clocked into the SDI input on the first rising
edge of SClk after CS has been asserted. This bit in-
dicates whether the current operation is a Read or
Write operation. A "1" in this bit specifies a Read op-
eration, a "0" in this bit specifies a Write operation.
Bits 2 through 5: The four (4) bit Address Values
(labeled A0, A1, A2 and A3)
The next four rising edges of the SClk signal clocks in
the 4-bit address value for this particular Read or
Write operation. The address selects the Command
Register in the XRT73L02 that the user either be
reading data from or writing data to. The address bits
must be applied to the SDI input pin in ascending or-
der with the LSB (least significant bit) first.
Bit 6 and 7:
T
ABLE
8: C
ONTENTS
OF
LLB_(
N
)
AND
RLB_(
N
)
AND
THE
C
ORRESPONDING
L
OOP
-B
ACK
M
ODE
FOR
C
HANNEL
(
N
)
LLB
_(n)
RLB
_(n)
L
OOP
-B
ACK
M
ODE
(
FOR
C
HANNEL
(
N
))
0
0
None
1
0
Analog Loop-Back Mode (See Section 4.1 for Details)
1
1
Digital Loop-Back Mode (See Section 4.2 for Details
0
1
Remote Loop-Back Mode (See Section 4.3 for Details