參數(shù)資料
型號: XRT73L02
廠商: Exar Corporation
英文描述: 2 Channel E3/DS3/STS-1 Line Interface Unit(2通道 E3/DS3/STS-1線接口單元)
中文描述: 2頻道E3/DS3/STS-1線路接口單元(2通道E3/DS3/STS-1線接口單元)
文件頁數(shù): 28/62頁
文件大?。?/td> 716K
代理商: XRT73L02
XRT73L02
2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. P1.1.0
á
PRELIMINARY
24
Address:
The register addresses presented in the
Hexadeci-
mal
format.
Type:
The Command Registers are either Read-Only (RO)
or Read/Write (R/W) type of registers.
The default value for each of the bit-fields in these
registers is "0".
a. Operating in the Hardware Mode
To configure individual Channel Data Rate, set the
E3_Ch_(n) and the STS-1/DS3_Ch_(n) input pins
(where n = 0 or 1) to the appropriate logic states
referenced in Table 3.
T
ABLE
2: A
DDRESSES
AND
B
IT
F
ORMATS
OF
XRT73L02 C
OMMAND
R
EGISTERS
R
EGISTER
B
IT
-F
ORMAT
ADDRESS
COMMAND
REGISTER
TYPE
D4
D3
D2
D1
D0
C
HANNEL
0
0x00
CR0-0
RO
RLOL_0
RLOS_0
ALOS_0
DLOS_0
DMO_0
0x01
CR1-0
R/W
TxOFF_0
TAOS_0
TxClkINV_0
TxLEV_0
TxBIN_0
0x02
CR2-0
R/W
Reserved
ENDECDIS_0
ALOSDIS_0
DLOSDIS_0
REQEN_0
0x03
CR3-0
R/W
SR/(DR)_0
LOSMUT_0
RxOFF_0
RxClk_0INV
Reserved
0x04
CR4-0
R/W
Reserved
STS-1/DS3_Ch_0
E3_Ch_0
LLB_0
RLB_0
0x05
CR5-0
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x06
CR6-0
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x07
CR7-0
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
C
HANNEL
1
0x08
CR0-1
RO
RLOL_1
RLOS_1
ALOS_1
DLOS_1
DMO_1
0x09
CR1-1
R/W
TxOFF_1
TAOS_1
TxClkINV_1
TxLEV_1
TxBIN_1
0x0A
CR2-1
R/W
Reserved
ENDECDIS_1
ALOSDIS_1
DLOSDIS_1
REQEN_1
0x0B
CR3-1
R/W
SR/(DR)_1
LOSMUT_1
RxOFF_1
RxClk_1INV
Reserved
0x0C
CR4-1
R/W
Reserved
STS-1/DS3_Ch_1
E3_Ch_1
LLB_1
RLB_1
0x0D
CR5-1
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x0E
CR6-1
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x0F
CR7-1
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
T
ABLE
3: S
ELECTING
THE
D
ATA
R
ATE
FOR
C
HANNEL
(
N
)
OF
THE
XRT73L02,
VIA
THE
E3_C
H
_(
N
)
AND
STS-1/
DS3_C
H
_(
N
)
INPUT
PINS
(H
ARDWARE
M
ODE
)
D
ATA
R
ATE
S
TATE
OF
E3_C
H
_(
N
) P
IN
(P
IN
20
OR
39)
S
TATE
OF
STS-1/DS3_CH_(
N
)
P
IN
(P
IN
21
OR
41)
M
ODE
OF
B3ZS/HDB3 E
NCODER
/
D
ECODER
B
LOCKS
E3 (34.368 Mbps)
1
X (Don't Care)
HDB3
DS3 (44.736 Mbps)
0
0
B3ZS
相關(guān)PDF資料
PDF描述
XRT73L03A 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03AIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03B 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L03BIV 3 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
XRT73L04A 4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT
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