á
XRT72L50
SINGLE CHANNEL DS3/E3 FRAMER WITH HDLC CONTROLLER
REV. 1.2.1
386
within the Tx TTB-0 register C6 through C0 are the CRC-7 bits calculated over the contents of all 16 TR bytes,
within the previous Trail Trace Buffer super-frame. The contents of the remaining Trail Trace Buffer registers
(e.g., Tx TTB-1 through Tx TTB-15) will typically contain the 15 ASCII characters required for the E.164
numbering format.
N
OTES
:
1.
The XRT72L50 Framer IC will not compute the CRC-7 value, to be written into the Tx TTB-0 register. The user’s
system must compute this value prior to writing it into the Tx TTB-0 register.
2.
The user, when writing data into the Tx TTB registers, must take care to insure that only the Tx TTB-0 register
contains an octet with a “1” in the MSB (most significant bit) position. All remaining Tx TTB registers (e.g., Tx
TTB-1 through Tx TTB-15) must contain octets with a “0” in the MSB position. The reason for this cautionary note
is presented in
Section 6.1.1.3
.
6.2.5
The Transmit E3 Line Interface Block
The XRT72L50 Framer IC is a digital device that takes E3 payload and overhead bit information from some
terminal equipment, processes this data and ultimately, multiplexes this information into a series of Outbound
E3 frames. However, the XRT72L50 Framer IC lacks the current drive capability to be able to directly transmit
this E3 data stream through some transformer-coupled coax cable with enough signal strength for it to be
received by the remote receiver. Therefore, in order to get around this problem, the Framer IC requires the use
of an LIU (Line Interface Unit) IC. An LIU is a device that has sufficient drive capability, along with the
necessary pulse-shaping circuitry to be able to transmit a signal through the transmission medium in a manner
that it can be reliably received by the far-end receiver.
Figure 166
presents a circuit drawing depicting the
Framer IC interfacing to an LIU (XRT73L00 DS3/E3/STS-1 Transmit LIU).
The Transmit Section of the XRT72L50 contains a block which is known as the Transmit E3 LIU Interface block.
The purpose of the Transmit E3 LIU Interface block is to take the Outbound E3 data stream, from the Transmit
E3 Framer block, and to do the following:
1.
Encode this data into one of the following line codes
a.
Unipolar (e.g., Single-Rail)
b.
AMI (Alternate Mark Inversion)
c.
HDB3 (High Density Bipolar - 3)
F
IGURE
166. I
NTERFACING
THE
XRT72L50 F
RAMER
IC
TO
THE
XRT73L00 DS3/E3/STS-1 LIU
VDD
U1
XRT72L50
TxPOS
65
TxNEG
64
TxLineClk
63
DMO
79
ExtLOS
78
RLOL
77
LLOOP
69
RLOOP
70
TAOS
68
TxLev
67
EncoDis
66
Req
71
RxPOS
76
RxNEG
75
RxLineClk
74
MOTO
27
Reset
28
A0
A1
A2
A3
A4
A5
A6
A7
A8
15
16
17
18
19
20
21
22
23
D0
D1
D2
D3
D4
D5
D6
D7
32
33
34
35
36
37
38
39
RDY_DTCK
6
W R_R/W
RD_DS
ALE_AS
7
10
CS
8
9
Int
13
TxSer/SndMsg
TxInClk
TxFrame
45
43
61
RxSer/RxIdle
RxClk
RxFrame
86
88
90
RxLOS
RxOOF
RxRed
RxAIS
95
94
93
87
NibIntf
25
U2
XRT73L00
TPDATA
37
TNDATA
38
TCLK
36
RCLK1
31
RNEG
32
RPOS
33
TTIP
41
TRING
40
MTIP
44
MRING
43
RRING
9
RTIP
8
DMO
4
RLOS
24
RLOL
23
LLB
14
RLB
15
TAOS
2
TxLEV
1
ENCODIS
21
REQDIS
12
T1
1:1
1
5
4
8
T2
1:1
1
5
4
8
R1
36
1
2
R2
36
1
2
R6
37.5
1
2
R3
270
1
2
R4
270
1
2
R5
37.5
1
2
C1
0.01uF
1
2
TxSER
TxInClk
TxFrame
NIBBLEINTF
RESETB
RTIP
RRING
CSB
RW
DS
AS
INTB
RxSer
RxClk
RxFrame
RxLOS
RxOOF
RxRED
RxAIS
A[8:0]
TRING
TTIP
INTB
D[7:0]