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參數(shù)資料
| 型號： | XRT16C854 |
| 廠商： | Exar Corporation |
| 英文描述： | 2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO |
| 中文描述： | 2.97V至5.5V四路UART的128字節(jié)FIFO |
| 文件頁數(shù)： | 32/54頁 |
| 文件大小： | 485K |
| 代理商： | XRT16C854 |
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XR16C854/854D
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
xr
REV. 3.0.1
32
4.7
The MCR register is used for controlling the serial/modem interface signals or general purpose inputs/outputs.
MCR[0]: DTR# Output
The DTR# pin is a modem control output. If the modem interface is not used, this output may be used as a
general purpose output.
Logic 0 = Force DTR# output to a logic 1 (default).
Logic 1 = Force DTR# output to a logic 0.
MCR[1]: RTS# Output
The RTS# pin is a modem control output and may be used for automatic hardware flow control by enabled by
EFR bit-6. If the modem interface is not used, this output may be used as a general purpose output.
Logic 0 = Force RTS# output to a logic 1 (default).
Logic 1 = Force RTS# output to a logic 0.
MCR[2]: Reserved
OP1# is not available as an output pin on the 854. But it is available for use during Internal Loopback Mode. In
the Loopback Mode, this bit is used to write the state of the modem RI# interface signal. If OP1# output is
required for RS485 operation, use the XR16C864.
MCR[3]: INT Output Enable
Enable or disable INT outputs to become active or in three-state. This function is associated with the INTSEL
input, see below table for details. This bit is also used to control the OP2# signal during internal loopback
mode. INTSEL pin must be set to a logic zero during 68 mode.
Logic 0 = INT (A-D) outputs disabled (three state) in the 16 mode (default). During loopback mode, it sets
OP2# internally to a logic 1.
Logic 1 = INT (A-D) outputs enabled (active) in the 16 mode. During loopback mode, it sets OP2# internally
to a logic 0.
T
ABLE
13: INT O
UTPUT
M
ODES
Modem Control Register (MCR) or General Purpose Outputs Control - Read/Write
MCR[4]: Internal Loopback Enable
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and
Figure 13
.
MCR[5]: Xon-Any Enable
Logic 0 = Disable Xon-Any function (for 16C550 compatibility, default).
Logic 1 = Enable Xon-Any function. In this mode, any RX character received will resume transmit operation.
The RX character will be loaded into the RX FIFO , unless the RX character is an Xon or Xoff character and
the 854 is programmed to use the Xon/Xoff flow control.
INTSEL
P
IN
MCR
B
IT
-3
INT A-D O
UTPUTS
IN
16 M
ODE
0
0
Three-State
0
1
Active
1
X
Active
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| XRT16L2552 | 2.25V TO 5.5V DUART WITH 16-BYTE FIFO |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT16L2552 | 制造商:EXAR 制造商全稱:EXAR 功能描述:2.25V TO 5.5V DUART WITH 16-BYTE FIFO |
| XRT2588CN | 制造商:Exar Corporation 功能描述: |
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