General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (
參數(shù)資料
型號(hào): XR17C152CM-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 6/62頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17C152 100TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
XR17C152
á
5V PCI BUS DUAL UART
REV. 1.2.0
14
1.2.2
General Purpose 16-bit Timer/Counter [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT
0XXX-XX-00-00)
A 16-bit down-count timer for general purpose timer or counter. Its clock source may be selected from internal
crystal oscillator or externally on pin TMRCK. The timer can be set to be a single-shot for a one-time event or
re-triggerable for a continuous interval. An interrupt may be generated in the INT Register when the timer times
out. It is controlled through 4 configuration registers [TIMERCNTL, TIMER, TIMELSB, TIMERMSB]. These
registers provide start/stop and re-triggerable or one-shot operation. The time-out output of the Timer can be
set to generate an interrupt for system or event alarm.
TIMER [15:8] Reserved
FIGURE 5. TIMER/COUNTER CIRCUIT.
TABLE 7: TIMER CONTROL REGISTERS
TIMERCNTL [0]
Logic 0 (default) disables Timer-Counter interrupt and logic one enables the interrupt, reading the
TIMERCNTL clears the interrupt.
TIMERCNLT [1]
Logic 0 (default) stops/pauses the timer and logic one starts/re-starts the timer/counter.
TIMERCNTL [2]
Logic 0 (default) selects re-trigger timer function and logic one selects one-shot (timer function.
TIMERCNTL [3]
Logic 0 (default) selects internal and logic one selects external clock to the timer/counter.
TIMERCNTL [4]
Routes the Timer-Counter interrupt to MPIO[0] if MPIOSEL[0]=0 for external event control.
TIMERCNTL [7:5]
Reserved (defaults to zero).
TM RC K
O SC. C L O C K
TIM ERC NTL [3 ]
16-B it
T im e r/C o unter
TIM ERC NTL [2 ]
R e -trig g e r
S ingle-s h ot
TIM ERC NTL [1 ]
Sta rt/Sto p
TIM ERC NTL [0 ]
T im e r In te rru p t, C h -0 IN T = 7
Tim e -out
Tim e r In te rrupt E n able
S ingle/R e -triggera b le
T IM E R M SB and T IM E R LSB
(16-bit V a lue)
0
1
0
1
0
1
N o In te rru p t
Clo c k
Se le c t
TIM ERC NTL [4 ]
0
1
M P IO [0 ]
M P IO L V L[0]
TIM E R C N TL R egister
R svd
MP IO [0 ]
Co n tro l
Clo c k
Se le ct
Sin g le /
R e -trig g e r
Sta rt/
Sto p
IN T
En a b le
B it-7 B it-6
B it-5
B it-4
B it-3
B it-2
B it-1
B it-0
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