參數(shù)資料
型號: XR17C152CM-0A-EVB
廠商: Exar Corporation
文件頁數(shù): 1/62頁
文件大?。?/td> 0K
描述: EVAL BOARD FOR XR17C152 100TQFP
標(biāo)準(zhǔn)包裝: 1
系列: *
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
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XR17C152
5V PCI BUS DUAL UART
JUNE 2004
REV. 1.2.0
GENERAL DESCRIPTION
The XR17C1521 (152) is a monolithic dual PCI Bus
Universal Asynchronous Receiver and Transmitter
(UART) in Exar’s PCI Bus UART family. The device is
designed to meet today’s 32-bit PCI Bus and high
bandwidth requirement in communication systems.
The global interrupt source register provides a com-
plete interrupt status indication for both channels to
speed up interrupt parsing. Each UART is indepen-
dently controlled and has its own 16C550 compatible
5G (Fifth Generation) register set, transmit and re-
ceive FIFOs of 64 bytes, fully programmable transmit
and receive FIFO trigger levels, transmit and receive
FIFO level counters, automatic hardware flow control
with programmable hysteresis, automatic software
(Xon/Xoff) flow control, automatic half-duplex control
output, wireless IrDA (Infrared Data Association) in-
frared encoder/decoder, 8 multi-purpose definable in-
puts/outputs, and a 16-bit general purpose timer/
counter.
NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787
APPLICATIONS
Network Management
Factory Automation and Process Control
Ethernet Network to Serial Ports
Point-of-Sale Systems
Remote Access Servers
Multi serial ports RS-232/RS-422/RS-485 Cards
FEATURES
High Performance Dual PCI UART
PCI Bus 2.2 Target Interface Compliance
5V PCI Bus Compliant up to 33MHz Clock
32-bit PCI Bus Interface with EEPROM Interface
A Global Interrupt Source Register for both UARTs
Data Transfer in Byte, Word and Double-word
Data Read/Write Burst Operation
Each UART is independently controlled with:
16C550 Compatible 5G Register Set
64-byte Transmit and Receive FIFOs
Transmit and Receive FIFO Level Counters
Automatic RTS/CTS or DTR/DSR Flow Control
Automatic Xon/Xoff Software Flow Control
Automatic RS485 Half-duplex Control Output with
16 Selectable Turn-around Delay
Infrared (IrDA 1.0) Data Encoder/Decoder
Programmable Data Rate with Prescaler
Up to 6.25 Mbps Serial Data Rate at 5V and 8X
Sampling
Eight Multi-Purpose Inputs/outputs
A General Purpose 16-bit Timer/Counter
Sleep Mode with Automatic Wake-up Indicator
Same package and pinout as the XR17D152
(14x14x1.0mm TQFP package)
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Registers
XTAL1
XTAL2
Crystal Osc/Buffer
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
PCI Local
Bus
Interface
CLK
RST#
AD[31:0]
C/BE[3:0]#
PAR
FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#
IDSEL
PERR#
SERR#
INTA#
Configuration
Space
Registers
.
MPIO0- MPIO7
Multi-purpose
Inputs/Outputs
TX1, RX1, DTR1#,
DSR1#, RTS1#,
CTS1#, CD1#, RI1#
16-bit
Timer/Counter
EECK
EEDI
EEDO
EECS
EEPROM
Interface
5V VCC
GND
ENIR
UART Channel 0
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
UART Channel 1
64 Byte TX FIFO
64 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
EN485#
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