參數(shù)資料
型號： XC56L307VF160
廠商： Freescale Semiconductor
文件頁數(shù)： 21/104頁
文件大?。?/td> 0K
描述： IC DSP 24BIT FIXED POINT 196-BGA
標(biāo)準包裝： 126
系列： DSP563xx
類型： 定點
接口： 主機接口，SSI，SCI
時鐘速率： 160MHz
非易失內(nèi)存： ROM（576 B）
芯片上RAM： 576kB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.80V
安裝類型： 表面貼裝
封裝/外殼： 196-LBGA
供應(yīng)商設(shè)備封裝： 196-MAPBGA（15x15）
包裝： 托盤
DC Electrical Characteristics
DSP56L307 Technical Data, Rev. 6
Freescale Semiconductor
2-3
2.3 DC Electrical Characteristics
Table 2-3.
DC Electrical Characteristics7
Characteristics
Symbol
Min
Typ
Max
Unit
Supply voltage:
Core (VCCQL) and PLL (VCCP)
I/O (VCCQH, VCCA, VCCD, VCCC, VCCH, and VCCS)
1.7
3.0
1.8
3.3
1.9
3.6
V
Input high voltage
D[0–23], BG, BB, TA
MOD/IRQ
1, RESET, PINIT/NMI and all
JTAG/ESSI/SCI/Timer/HI08 pins
EXTAL8
VIH
VIHP
VIHX
2.0
0.8
× VCCQH
—
VCCQH + 0.3
VCCQH
V
Input low voltage
D[0–23], BG, BB, TA, MOD/IRQ1, RESET, PINIT
All JTAG/ESSI/SCI/Timer/HI08 pins
EXTAL8
VIL
VILP
VILX
–0.3
—
0.8
0.2
× V
CCQH
V
Input leakage current
IIN
–10
—
10
A
High impedance (off-state) input current
(@ 2.4 V / 0.4 V)
ITSI
–10
—
10
A
Output high voltage
TTL (IOH = –0.4 mA)
5,7
CMOS (IOH = –10 A)
5
VOH
2.4
VCC – 0.01
—
V
Output low voltage
TTL (IOL = 3.0 mA, open-drain pins IOL = 6.7 mA)
5,7
CMOS (IOL = 10 A)
5
VOL
—
0.4
0.01
V
Internal supply current2:
In Normal mode
In Wait mode
3
In Stop mode4
ICCI
ICCW
ICCS
—
150
7. 5
100
—
mA
A
PLL supply current
—1
2.5
mA
Input capacitance5
CIN
—
10
pF
Notes:
1.
Refers to MODA/IRQA, MODB/IRQB, MODC/IRQC, and MODD/IRQD pins.
2.
Section 4.3 provides a formula to compute the estimated current requirements in Normal mode. To obtain these results, all
inputs must be terminated (that is, not allowed to float). Measurements are based on synthetic intensive DSP benchmarks (see
Appendix A). The power consumption numbers in this specification are 90 percent of the measured results of this benchmark.
This reflects typical DSP applications. Typical internal supply current is measured with VCCQP = 3.3 V,
VCC = 1.8 V at TJ = 100°C.
3.
To obtain these results, all inputs must be terminated (that is, not allowed to float). PLL and XTAL signals are disabled during
Stop state.
4.
DC current in Stop mode is evaluated based on measurements. To obtain these results, all inputs not disconnected at Stop
mode must be terminated (that is, not allowed to float).
5.
Periodically sampled and not 100 percent tested.
6.
VCCQH = 3.3 V ± 0.3 V, VCC = 1.8 V ± 0.1 V; TJ = –40°C to +100 °C, CL = 50 pF
7.
This characteristic does not apply to XTAL and PCAP.
8.
Driving EXTAL to the low VIHX or the high VILX value may cause additional power consumption (DC current). To minimize
power consumption, the minimum VIHX should be no lower than
0.9
× V
CCQH and the maximum VILX should be no higher than 0.1 × VCCQH.
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