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參數(shù)資料

W9968CF

- 62 -

Bits 15-12 Video Capture U FIFO High Threshold

When video capture U FIFO (planar mode) is filled to this threshold, a request is generated

to the DRAM controller for DRAM access. It is not used if the captured video is in packed

mode. Initial value is 08H.

Bits 11-8 Video Capture U FIFO Low Threshold

When video capture U FIFO (planar mode) is fetched to this threshold by DRAM controller,

the FIFO is ready to release DRAM access to other pending requests. It is not used if the

captured video is in packed mode. Initial value is 04H.

Bits 7-4

Video Capture V FIFO High Threshold

When video capture V FIFO (planar mode) is filled to this threshold, a request is generated

to the DRAM controller for DRAM access. It is not used if the captured video is in packed

mode. Initial value is 08H.

Bits 3-0

Video Capture V FIFO Low Threshold

When video capture V FIFO (planar mode) is fetched to this threshold by DRAM controller,

the FIFO is ready to release DRAM access to other pending requests. It is not used if the

captured video is in packed mode. Initial value is 04H.

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