
W9968CF
Publication Release Date: May 1999
- 11 - Revision A2
4 PIN DESCRIPTION
The following signal types are used in these descriptions.
U
B
O
AIO
P
G
#
Input pin
Input pin with internal pull-up resistor
Bi-directional input/output pin
Output pin
Analog input/output pin
Power supply pin
Ground pin
Active low
4.1 Pin Definition
USB and External Transceiver Interface (8 pins)
Pin Name
Pin Number
Type
Description
DM
50
AIO
Data Minus line of differential USB upstream port.
DP
51
AIO
Data Plus line of differential USB upstream port.
Note: provide an external 1.5 K
pull-up resistor at DP so the
device indicates to the host that it is a full-speed device.
VM
53
U
Single-ended Receiver Input of the data minus line.
VP
54
U
Single-ended Receiver Input of the data plus line.
RCV
55
U
Differential Receiver Input.
TOE#
57
O
Output Enable for external transceiver.
VMO
58
O
Data Minus Output to the differential driver.
VPO
59
O
Data Plus Output to the differential driver.
DRAM Interface (37 pins)
Pin Name
Pin Number
Type
Description
MD[15:0]
92-95, 97-106,
109-110
B
Data Bus.
MA[10:0]
65-68, 70, 72-
77
O
Address Bus.
Note: for SDRAM, MA[10:0] are sampled during the ACTIVE