參數(shù)資料
型號: W9968CF
英文描述: Digital Camera
中文描述: 數(shù)碼相機
文件頁數(shù): 12/78頁
文件大?。?/td> 814K
代理商: W9968CF
W9968CF
- 12 -
command (row address MA[10:0]) and READ/WRITE command
(column address MA[7:0], with MA10 defining AUTO
PRECHARGE) to select one location out of the 521K available in
the respective bank. MA10 is sampled during a PRECHARGE
command to determine if all banks are to be precharged (MA10
HIGH).
BA
78
O
EDO DRAM: Not used.
SDRAM: Bank Address Input. BA defines to which internal bank
the ACTIVE, READ, WRITE or PRECHARGE command is being
applied. BA is also used to program the 12th bit of the Mode
Register.
RAS[1:0]#
CS[1:0]#
80, 81
O
EDO DRAM: Row Address Strobes.
SDRAM: Chip Select. CS# enables the command decoder for
the SDRAM.
CAS[1:0]#
DQM[1:0]
89, 90
O
EDO DRAM: Column Address Strobes.
SDRAM: Input/Output Mask. DQM[1:0] are input mask signals
for write accesses and output enable signals for read accesses.
DQM0 corresponds to MD[7:0]; DQM1 corresponds to MD[15:8].
OE#
CKE
84
O
EDO DRAM: Output Enable.
SDRAM: Clock Enable. CKE activates the SMCLK signal. The
SDRAM enters precharge power-down to deactivate the input
and output buffers, excluding CKE, for maximum power saving
when CKE is LOW coincident with a NOP.
WE#
88
O
EDO DRAM: Write Enable.
SDRAM: Command Input. SRAS#, SCAS#, and WE# (along with
CS#) define the command being entered.
SRAS#
82
O
EDO DRAM: Not used.
SDRAM: Command Input. SRAS#, SCAS#, and WE# (along with
CS#) define the command being entered.
SCAS#
85
O
EDO DRAM: Not used.
SDRAM: Command Input. SRAS#, SCAS#, and WE# (along with
CS#) define the command being entered.
SMCLK
86
O
EDO DRAM: Not used.
SDRAM: Clock.
Input Video Interface (22 pins)
Pin Name
Pin Number
Type
Description
Y[7:0]
117-120, 122-
125
Digital Y (Luminance) Inputs in 16-bit Mode, or Digital YUV
Inputs in 8-bit Mode.
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