參數(shù)資料
型號(hào): W9812G6JH-6
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54
封裝: 0.400 INCH, ROHS COMPLIANT,TSOP2-54
文件頁(yè)數(shù): 30/42頁(yè)
文件大小: 656K
代理商: W9812G6JH-6
W9812G6JH
Publication Release Date: Sep. 08, 2010
- 36 -
Revision A04
11.16 Auto-precharge Timing (Write Cycle)
Act
01
3
2
(1) CAS Latency = 2
(a) burst length = 1
DQ
45
7
68
9
11
10
Write
D0
Act
AP
Command
(b) burst length = 2
DQ
Write
D0
Act
AP
Command
tRP
D1
(c) burst length = 4
DQ
Write
D0
Act
AP
Command
tRP
D1
(d) burst length = 8
DQ
Write
D0
Act
AP
Command
tRP
D1
D2
D3
D2
D3
D4
D5
D6
D7
(2) CAS Latency = 3
(a) burst length = 1
DQ
Write
D0
Act
AP
Command
(b) burst length = 2
DQ
Write
D0
Act
AP
Command
tRP
D1
(c) burst length = 4
DQ
Write
D0
Act
AP
Command
tRP
D1
(d) burst length = 8
DQ
Write
D0
AP
Command
tRP
D1
D2
D3
D2
D3
D4
D5
D6
D7
tWR
12
Act
represents the Write with Auto precharge command.
represents the start of internal precharing.
represents the Bank Active command.
Write
AP
Act
When the /auto precharge command is asserted,the period from Bank Activate
command to the start of intermal precgarging must be at least tRAS (min).
Note )
CLK
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