參數(shù)資料
型號: W987Z6CBG80
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54
封裝: 8 X 9 MM, 1.20 MM HEIGHT, FBGA-54
文件頁數(shù): 1/46頁
文件大?。?/td> 1634K
代理商: W987Z6CBG80
Preliminary W987Z6CB
2M
× 4 BANKS × 16 BIT SDRAM
Publication Release Date: June 24, 2002
- 1 -
Revision A1
Table of Contents-
1. GENERAL DESCRIPTION ..................................................................................................................3
2. FEATURES ..........................................................................................................................................3
3. AVAILABLE PART NUMBER ..............................................................................................................3
4. BALL CONFIGURATION .....................................................................................................................4
5. BALL DESCRIPTION...........................................................................................................................5
6. BLOCK DIAGRAM ...............................................................................................................................6
7. ABSOLUTE MAXIMUM RATINGS ......................................................................................................7
8. DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS.......................................7
9. CAPACITANCE ...................................................................................................................................7
10. OPERATING CURRENT ...................................................................................................................8
11. AC CHARACTERISTICS AND OPERATING CONDITION...............................................................9
12. FUNCTIONAL DESCRIPTION ........................................................................................................12
Power Up Sequence.......................................................................................................................12
Command Function ........................................................................................................................12
Read Operation ..............................................................................................................................15
Write Operation...............................................................................................................................15
Precharge .......................................................................................................................................15
Burst Termination ...........................................................................................................................15
Interruption......................................................................................................................................16
Refresh Operation ..........................................................................................................................16
Power Down Mode .........................................................................................................................17
Mode Register Set Operation .........................................................................................................17
Simplified State Diagram ................................................................................................................19
13. TIMING WAVEFORMS....................................................................................................................20
Command Input Timing ..................................................................................................................20
Read Timing ...................................................................................................................................21
Control Timing of Input/Output Data...............................................................................................22
14. OPERATING TIMING EXAMPLE ....................................................................................................24
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3)........................................................24
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto Precharge).............................25
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3)........................................................26
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto Precharge).............................27
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