參數(shù)資料
型號: W971GG6IB-25
廠商: WINBOND ELECTRONICS CORP
元件分類: DRAM
英文描述: 32M X 16 DDR DRAM, 0.4 ns, PBGA84
封裝: 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84
文件頁數(shù): 45/86頁
文件大?。?/td> 1360K
代理商: W971GG6IB-25
W971GG6IB
Publication Release Date: Oct. 23, 2009
- 5 -
Revision A02
3. KEY PARAMETERS
SPEED GRADE
DDR2-1066
DDR2-800
DDR2-667
Bin(CL-tRCD-tRP)
7-7-7
5-5-5/6-6-6
5-5-5
SYM.
Part Number Extension
-18
-25
-3
Min.
1.875 nS
@CL = 7
Max.
7.5 nS
Min.
1.875 nS
2.5 nS
@CL = 6
Max.
7.5 nS
8 nS
Min.
3 nS
2.5 nS
3 nS
@CL = 5
Max.
7.5 nS
8 nS
Min.
3.75 nS
@CL = 4
Max.
7.5 nS
8 nS
Min.
5 nS
tCK(avg)
Average clock period
@CL = 3
Max.
8 nS
tRCD
Active to Read/Write Command Delay
Time
Min.
13.125 nS
12.5 nS
15 nS
tRP
Precharge to Active Command Period
Min.
13.125 nS
12.5 nS
15 nS
tRC
Active to Ref/Active Command Period
Min.
53.125 nS
52.5 nS
55 nS
tRAS
Active to Precharge Command Period
Min.
40 nS
IDD0
Operating current
Max.
130 mA
115 mA
110 mA
IDD1
Operation current (Single bank)
Max.
155 mA
140 mA
135 mA
IDD4R
Operating burst read current
Max.
245 mA
200 mA
180 mA
IDD4W
Operating burst write current
Max.
250 mA
205 mA
185 mA
IDD5B
Burst refresh current
Max.
370 mA
360 mA
350 mA
IDD6
Self refresh current
Max.
10 mA
IDD7
Operating bank interleave read current
Max.
450 mA
385 mA
330 mA
相關(guān)PDF資料
PDF描述
W9751G6JB-25A 32M X 16 DDR DRAM, 0.4 ns, PBGA84
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