參數(shù)資料
型號: W83977TF(EOL)
英文描述: W83877TF plus KBC. CIR. RTC
中文描述: W83877TF加比聯(lián)。稅務局局長。時鐘
文件頁數(shù): 88/161頁
文件大小: 592K
代理商: W83977TF(EOL)
W83977EF/ CTF
PRELIMINARY
Publication Release Date: March 1999
-79 -
Revision A1
6.3 Status Register
The status register is an 8-bit read-only register at I/O address 64H (Default, PnP programmable I/O
address LD5-CR62 and LD5-CR63), that holds information about the status of the keyboard controller
and interface. It may be read at any time.
BIT
0
BIT FUNCTION
Output Buffer Full
DESCRIPTION
0: Output buffer empty
1: Output buffer full
0: Input buffer empty
1: Input buffer full
This bit may be set to 0 or 1 by writing to the system flag
bit in the command byte of the keyboard controller. It
defaults to 0 after a power-on reset.
0: Data byte
1: Command byte
0: Keyboard is inhibited
1: Keyboard is not inhibited
0: Auxiliary device output buffer empty
1: Auxiliary device output buffer full
0: No time-out error
1: Time-out error
0: Odd parity
1: Even parity (error)
1
Input Buffer Full
2
System Flag
3
Command/Data
4
Inhibit Switch
5
Auxiliary Device Output
Buffer
General Purpose Time-
out
Parity Error
6
7
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