參數(shù)資料
型號(hào)： W6692ACD
廠商： WINBOND ELECTRONICS CORP
元件分類： 數(shù)字傳輸電路
英文描述： DATACOM, ISDN CONTROLLER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 62/98頁
文件大?。?/td> 584K
代理商： W6692ACD
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-65 -
To access peripheral device, first write the peripheral address in this register and then perform read or write at XDATA
register. The address written in this register is output on XAD7-0 in address phase of data access and can be latched by XALE
signal.
8.1.34 Peripheral Data Register
XDATA
Read/Write
Address F8H/3EH
Value after reset: Undefined
The register content depends on PCTL:XMODE setting.
XMODE = 0 : Simple IO mode, Valid in PCI or Intel/Motorola Bus mode
7
6
5
4
3
2
1
0
IO10
IO9
IO8
IO9-8
Read or Write Data of Pins IO9-8
Input data of pins IO9-8 if PCTL:OE4=0.
Output data of pins IO9-8 if PCTL:OE4=1.
IO10
Read or Write Data of Pins IO10
Input data of pins IO10 if PCTL:OE5=0.
Output data of pins IO10 if PCTL:OE5=1.
XMODE = 1 : 8-bit multiplexed microprocessor mode, Valid in PCI Bus mode only
7
6
5
4
3
2
1
0
XD7
XD6
XD5
XD4
XD3
XD2
XD1
XD0
XD7-0
Peripheral Data
During data phase of peripheral access, they are outputs to XAD7-0 if write, or inputs from XAD7-0 if read.
8.1.35 Serial EEPROM Control Register
EPCTL
Read/Write
Address FCH/3FH
Value after reset : X0H
7
6
5
4
3
2
1
0
SDI
EN
SK
CS
SDO
SDI
Input Data of EPSDI
When read, this bit returns the current data on pin EPSDI. Write operation is ignored.
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