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參數(shù)資料
| 型號： | W6692ACD |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DATACOM, ISDN CONTROLLER, PQFP100 |
| 封裝： | LQFP-100 |
| 文件頁數(shù)： | 24/98頁 |
| 文件大小： | 584K |
| 代理商： | W6692ACD |
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Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-30 -
Device
Settings
Result
W6692A
k =2
Pass
7.2.5.6 FAinfD_kfr
This is to test the number k of IX_I4noflag frames necessary for loss of frame alignment.
Device
Settings
Result
W6692A
k = 2
Pass
7.2.5.7 Faregain
This is to test the number m of good frames necessary for regain of frame alignment. The TE regains frame alignment at m+1
frame.
The W6692A achieves synchronization after 5 frames, i.e m=4.
Device
Settings
Result
W6692A
m = 4
Pass
7.2.6 Multiframe Synchronization
As specified by ITU-T I.430, the Q bit is transmitted from TE to NT in the position normally occupied by the auxiliary
framing bit (FA) in one frame out of 5, whereas the S bit is transmitted from NT to TE. The S and Q bit positions and multiframe
structure are shown in Table 7.6.
The functions provided by W6692A are:
-
Multiframe synchronization: Synchronization is achived when the M bit pattern has been correctly received during
20 consecutive frames starting from frame number 1.
Note: Criterion for multiframe synchronization is not defined in I.430 Recommendation.
-
S bits receive and detect: When synchronization is achieved, the four received S bits in frames 1,6,11,16 are stored
as S1 to S4 in the SQR register respectively. A change in the recived four bits (S1-4) is indicated by an interrupt.
-
Multiframe synchronization monitoring: Multiframe synchronization is constantly monitored. The synchronization
state is indicated by the MSYN bit in the SQR register.
-
Q bits transmit and FA mirroring: When multiframe synchronization is achived, the four bits Q1-4 stored in the
SQXR register are transmitted as the four Q bits (FA-bit position) in frames 1,6,11 and 16. Otherwise the FA bit
transmitted is a mirror of the received FA-bit. At loss of synchronization, the mirroring is resumed at the next FA-
bit.
-
The multiframe synchronization can be disabled by setting MFD bit in the D_MODE register.
相關(guān)PDF資料 |
PDF描述 |
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| W6692ACF | DATACOM, ISDN CONTROLLER, PQFP100 |
| W6694ACD | DATACOM, ISDN CONTROLLER, PQFP48 |
| W671320P | TELECOM-SLIC, PQCC28 |
| W671361P | TELECOM-SLIC, PQCC28 |
| W671361Y | TELECOM-SLIC, QCC32 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W6692ACF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC |
| W6694 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W6694A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface |
| W6694CD | 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller |
| W66ARX-18 | 制造商:Magnecraft 功能描述: |
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