參數(shù)資料
型號： W6692ACD
廠商： WINBOND ELECTRONICS CORP
元件分類： 數(shù)字傳輸電路
英文描述： DATACOM, ISDN CONTROLLER, PQFP100
封裝： LQFP-100
文件頁數(shù)： 16/98頁
文件大?。?/td> 584K
代理商： W6692ACD
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-23 -
This state is identical to "F3 Deactivated without clock" except the internal clocks are enabled. The state is entered by the
ECK command.
The clocks are enabled approximately 0.5 ms to 4 ms after the ECK command, depending on the crystal
capacitances. (It is about 0.5 ms for 12pF to 33pF capacitance).
F3
Awaiting Deactivation
The W6692A enters this state after receiving INFO 0 (in states F5 to F8) for 16ms (64 frames). This time constant prevents
spurious effect on S interface. Any non-INFO 0 signal on the S interface causes transition to "F5 Identifying Input" state. If this
transition does not occur in a specific time (500 - 1000 ms), the microprocessor may issue DRC or ECK command to deactivate
layer 1.
F4
Awaiting Signal
This state is reached when an activate request command has been received. In this state, the layer 1 transmits INFO1 and
INFO 0 is received from the S interface. The software starts timer T3 of I.430 when issuing activate request command. The
software deactivates layer 1 if no signal other than INFO 0 has been received on S interface before expiration of T3.
F5
Identifying Input
After the receipt of any non-INFO 0 signal from NT, the W6692A ceases to transmit INFO 1 and awaits identification of
INFO 2 or INFO 4. This state is reached at most 50
s after a signal different from INFO 0 is present at the receiver of the S
interface.
F6
Synchronized
When W6692A receives an activation signal (INFO 2), it responds with INFO 3 and waits for normal frames (INFO 4). This
state is reached at most 6 ms after an INFO 2 arrives at the S interface (in case the clocks were disabled in "F3 Deactivated
without clock").
F7
Activated
This is the normal active state with the layer 1 protocol activated in both directions. From state "F6 Synchronized" , state F7
is reached at most 0.5 ms after reception of INFO 4. From state "F3 Deactivated without clock" with the clocks disabled, state F7
is reached at most 6 ms after the W6692A is directly activated by INFO 4.
F8
Lost Framing
This is the state where the W6692A has lost frame synchronization and is awaiting resynchronization by INFO 2 or INFO 4
or deactivation by INFO 0.
Special States:
Analog Loop Initiated
On Enable Analog Loop command, INFO 3 is sent by the line transmitter internally to the line receiver (INFO 0 is sent to the
line). The receiver is not yet synchronized.
Analog Loop Activated
The receiver is synchronized on INFO 3 which is looped back internally from the transmitter. The indication 'TI" or "ATI" is
sent depending on whether or not a signal different from INFO 0 is detected on the S interface.
Send Continuous Pulses
相關(guān)PDF資料
PDF描述
W6692ACF DATACOM, ISDN CONTROLLER, PQFP100
W6694ACD DATACOM, ISDN CONTROLLER, PQFP48
W671320P TELECOM-SLIC, PQCC28
W671361P TELECOM-SLIC, PQCC28
W671361Y TELECOM-SLIC, QCC32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
W6692ACF 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ISDN LINE INTERFACE|BASIC|CMOS|QFP|100PIN|PLASTIC
W6694 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller
W6694A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TE Mode S/T Controller with USB 1.1 Interface
W6694CD 制造商:WINBOND 制造商全稱:Winbond 功能描述:USB Bus ISDN S/T-Controller
W66ARX-18 制造商:Magnecraft 功能描述:
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