參數(shù)資料
型號: W6692ACD
廠商: WINBOND ELECTRONICS CORP
元件分類: 數(shù)字傳輸電路
英文描述: DATACOM, ISDN CONTROLLER, PQFP100
封裝: LQFP-100
文件頁數(shù): 29/98頁
文件大?。?/td> 584K
代理商: W6692ACD
Data Sheet
W6692A PCI ISDN S/T-Controller
Publication Release Date:
Mar,2000
Revision 1.0
-35 -
7.5 PCM Port
There are two PCM ports in W6692A. Data is valid when respective PFCK is HIGH. The frame synchronization clocks
(PFCK1-2) are 8 kHz and the bit synchronization clock (PBCK) is 1.536 MHz.
7.6 D Channel HDLC Controller
There are two HDLC protocols that are used for ISDN layer 2 functions : LAPD and LAPB. Their frame formats are shown
below.
LAPB modulo 8 :
flag
(1 octet)
address
(1octet)
control
(1octet)
information
(0 or N octets)
FCS
(2 octets)
flag
(1 octet)
Control field bits
7
6
5
4
3
2
1
0
I frame
N(R)
P
N(S)
0
S frame
N(R)
P/F
S
0
1
U frame
M
P/F
M
1
LAPB modulo 128 :
flag
(1 octet)
address
(1octet)
control
(1 or 2 octets)
information
(0 or N octets)
FCS
(2 octets)
flag
(1 octet)
1st
octet
2nd octet
Control field bits
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
I frame
N(S)
0
N(R)
P
S frame
X
S
0
1
N(R)
P/F
U frame
M
P/F
M
1
LAPD : modulo 128 only
flag
(1 octet)
address
(2 octets)
control
(2 octets)
information
(0 or N octets)
FCS
(2 octets)
flag
(1 octet)
1st
octet
2nd octet
Control field bits
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
I frame
N(S)
0
N(R)
P/F
S frame
0
S
0
1
N(R)
P/F
U frame
M
P/F
M
1
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