參數(shù)資料
型號: VG36641641BT
廠商: Vanguard International Semiconductor Corporation
英文描述: CMOS Synchronous Dynamic RAM
中文描述: 同步動態(tài)隨機存儲器的CMOS
文件頁數(shù): 25/69頁
文件大?。?/td> 1364K
代理商: VG36641641BT
Document :1G5-0177
Rev.2
Page 25
VIS
VG36644041DT / VG36648041DT / VG36641641DT
CMOS Synchronous Dynamic RAM
10.BURST Termination
There are two methods to terminate a burst operation other than using a read or a write command. One is the burst
stop command and the other is the precharge command.
10.1 BURST Stop Command
During a read burst, when the burst stop command is issued, the burst read data are terminated and the data bus
goes to high-impedance after the CAS latency from the burst stop command.
During a write burst, when the burst stop command is issued, the burst write data are termained and data bus goes to
Hi-Z at the same clock with the burst stop command.
Burst Termination
Remark
BST: Burst stop command
Remark
BST: Burst command
Burst lengh=X, CAS Intency=2,3
T6
CLK
Command
CAS latency=2
DQ
CAS latency=3
DQ
Q0
Q2
Q1
Read
T0
T1
T2
T3
T4
T5
T7
BST
Hi-Z
Q0
Q2
Q1
Hi-Z
Burst lengh=X, CAS latency=2,3
T6
CLK
Command
CAS latency=2,3
DQ
Q0
Q2
Q1
Write
T0
T1
T2
T3
T4
T5
T7
BST
Hi-Z_
Q0
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