- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373747 > TTSI2K32T (Lineage Power) 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時(shí)隙交換機(jī)) PDF資料下載
參數(shù)資料
| 型號： | TTSI2K32T |
| 廠商： | Lineage Power |
| 英文描述： | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時(shí)隙交換機(jī)) |
| 中文描述： | 2048通道，32道時(shí)隙交換器（2048通道，32路干線時(shí)隙交換機(jī)） |
| 文件頁數(shù)： | 57/66頁 |
| 文件大?。?/td> | 1321K |
| 代理商： | TTSI2K32T |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當(dāng)前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
Preliminary Data Sheet
February 1999
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
57
Lucent Technologies Inc.
Timing Characteristics
(continued)
5-7063(F)r.2
Figure 16. Asynchronous Read Cycle Timing Using DT Handshake
5-7064(F)r.2
Figure 17. Asynchronous Write Cycle Timing Using DT Handshake
Table 47. Asynchronous Read and Write Interface Timing Using DT Handshake
* CS asynchronously controls the output enable of D[7—0] and DT. The delay from CS to the output enable of DT is equivalent to the delay
from AS or DS to DT. Therefore, in order to guarantee that DT is driven high before being 3-stated, a CS hold time is required (t3). If this tim-
ing cannot be met, then there are two options. One, disconnect DT and rely on wait-states to terminate the cycle. The read or write cycle will
be completed by the device 183 ns after the start of the cycle, which is defined by CS, AS, and DS all being active. The second option is to
use an external pull-up on DT to pull DT high within the timing requirements of the microprocessor.
Symbol
Description
Min
Max
Unit
t1
t2
t3
t4
t5
t6
t7
t8
A[14—0] or R/W Setup to AS
A[14—0] or R/W Hold from AS
CS Hold from AS or DS
DT Output Delay from AS or DS (C
L
= 50 pF)
DT or D[7—0] High-impedance from CS (C
L
= 50 pF)
D[7—0] Input Setup to DS (C
L
= 50 pF)
D[7—0] Input Hold from DS (C
L
= 50 pF)
D[7—0] Output Setup Prior to DT Output (C
L
= 50 pF)
0
0
4*
3*
—
0
0
0
—
—
—
8*
8.5*
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
D[7—0]
AS
DS
DT
READ DATA
t4
t4
t8
CS
A[14—0]
READ ADDRESS
t3
R/W
t1
t2
t5
HIGH IMPEDANCE
D[7—0]
AS
DS
DT
WRITE DATA
t4
t6
CS
A[14—0]
WRITE ADDRESS
t3
R/W
t1
t2
t7
t4
t5
HIGH IMPEDANCE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger(4096通道、32路干線時(shí)隙交換機(jī)) |
| TU24C04 | CMOS I2C 2-WIRE BUS 4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 512 X 8 BIT EEPROM |
| TU24C04BP | CMOS I2C 2-WIRE BUS 4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 512 X 8 BIT EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSL-1 | 功能描述:電線鑒定 THERM. TRANS. SELFLAM LABEL RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
| TTSL10VC3-5 | 功能描述:電線鑒定 ThermTrans, Self-Lam Label, Vinyl, .50" RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。