- 您現(xiàn)在的位置：買賣IC網 > PDF目錄373747 > TTSI2K32T (Lineage Power) 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機) PDF資料下載
參數(shù)資料
| 型號： | TTSI2K32T |
| 廠商： | Lineage Power |
| 英文描述： | 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時隙交換機) |
| 中文描述： | 2048通道，32道時隙交換器（2048通道，32路干線時隙交換機） |
| 文件頁數(shù)： | 3/66頁 |
| 文件大小： | 1321K |
| 代理商： | TTSI2K32T |
第1頁第2頁當前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁
Preliminary Data Sheet
February 1999
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
3
Lucent Technologies Inc.
List of Figures
Figures
Page
Figure 1. Block Diagram of the TTSI2K32T .............................................................................................................6
Figure 2. 217-Pin PBGA (Bottom View)...................................................................................................................7
Figure 3. A Typical TSI Application........................................................................................................................15
Figure 4. An 8K Time-Slot Switch Made from 4K TSIs ..........................................................................................17
Figure 5. Asynchronous Read................................................................................................................................18
Figure 6. Asynchronous Write................................................................................................................................18
Figure 7. Synchronous Read .................................................................................................................................19
Figure 8. Synchronous Write..................................................................................................................................19
Figure 9. Mixed-Highway Data Rates ....................................................................................................................21
Figure 10. Virtual and Physical Frames .................................................................................................................22
Figure 11. Synchronization to FSYNC ...................................................................................................................23
Figure 12. Highway Offsets....................................................................................................................................24
Figure 13. Mixed Low-Latency and Frame-Integrity Modes...................................................................................28
Figure 14. Block Diagram of the TTSI2K32T's Boundary-Scan Test Logic ...........................................................31
Figure 15. BS TAP Controller State Diagram.........................................................................................................32
Figure 16. Asynchronous Read Cycle Timing Using DT Handshake.....................................................................57
Figure 17. Asynchronous Write Cycle Timing Using DT Handshake.....................................................................57
Figure 18. Asynchronous Read Cycle Timing Using Only CS ...............................................................................58
Figure 19. Asynchronous Write Cycle Timing Using Only CS ...............................................................................58
Figure 20. Synchronous Read Cycle Timing..........................................................................................................59
Figure 21. Synchronous Write Cycle Timing..........................................................................................................59
Figure 22. TDM Highway Timing............................................................................................................................61
Figure 23. JTAG Interface Timing..........................................................................................................................62
相關PDF資料 |
PDF描述 |
|---|---|
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 4096-Channel, 32-Highway Time-Slot Interchanger(4096通道、32路干線時隙交換機) |
| TU24C04 | CMOS I2C 2-WIRE BUS 4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 512 X 8 BIT EEPROM |
| TU24C04BP | CMOS I2C 2-WIRE BUS 4K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 512 X 8 BIT EEPROM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TTSI2K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSI4K32T3BAL | 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger |
| TTSL-1 | 功能描述:電線鑒定 THERM. TRANS. SELFLAM LABEL RoHS:否 制造商:TE Connectivity / Q-Cees 產品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
| TTSL10VC3-5 | 功能描述:電線鑒定 ThermTrans, Self-Lam Label, Vinyl, .50" RoHS:否 制造商:TE Connectivity / Q-Cees 產品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in |
發(fā)布緊急采購，3分鐘左右您將得到回復。