參數(shù)資料
型號(hào)： TTSI2K32T
廠商： Lineage Power
英文描述： 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時(shí)隙交換機(jī))
中文描述： 2048通道，32道時(shí)隙交換器（2048通道，32路干線時(shí)隙交換機(jī)）
文件頁數(shù)： 46/66頁
文件大?。?/td> 1321K
代理商： TTSI2K32T
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
46
Lucent Technologies Inc.
Configuration Register Architecture
(continued)
Table 31. Test-Pattern Error Counter (Byte 0) (0x10)
*
* Read-only register.
Table 32. Test-Pattern Error Counter (Byte 1) (0x11)
*
* Read-only register.
Note:
The error counter will be incremented each time a bit error is detected by the pattern checker.
In order to ensure that the correct value is read from these registers, byte 0 must be read first followed by
byte 1. This action will latch the error counter value and allow the counter to be reset and continue recording
as time proceeds.
Table 33. Test-Pattern Generator Data Register (0x12)
Table 34. Version Register (0x13)
*
* Read-only register.
Reading a 00 from this register indicates version number 1.0.
Bit
7—0
Symbol
EC[7—0]
Name/Description
Error Counter[7
—
0].
Least significant bits of 16-bit error counter. See note
below for resetting counter.
Bit
7—0
Symbol
EC[15—8]
Name/Description
Error Counter[15
—
8].
Most significant bits of 16-bit error counter. See note
below for resetting counter.
Bit
7—0
Symbol
GTP[7—0]
Name/Description
Generator Test Pattern[7
—
0].
The data written here will be sent out repeatedly
if the fixed data test-pattern mode is selected in the test-pattern style register.
Bit
7—2
1—0
Symbol
—
VER[1—0]
Name/Description
Reserved.
Version Number.
Read as 00
.
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