參數(shù)資料
型號(hào): TTSI2K32T
廠商: Lineage Power
英文描述: 2048-Channel, 32-Highway Time-Slot Interchanger(2048通道、32路干線時(shí)隙交換機(jī))
中文描述: 2048通道,32道時(shí)隙交換器(2048通道,32路干線時(shí)隙交換機(jī))
文件頁數(shù): 32/66頁
文件大?。?/td> 1321K
代理商: TTSI2K32T
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
32
Lucent Technologies Inc.
JTAG Boundary-Scan Specification
(continued)
Test Access Port Controller
The test access port controller is a synchronous sequence controller with 16 states. The state changes are preset
by the TMS, TCK, and TRST signals and by the previous state. The state changes always take place when the
TCK edge rises. Figure 15 shows the TAP controller state diagram.
5-3924(F)r.5
Figure 15. BS TAP Controller State Diagram
The value shown next to each state transition in Figure 15 represents the signal present at TMS at the time of a ris-
ing edge at TCK.
The description of the TAP controller states is given in IEEEStd. 1149.1-1990 Section 5.1.2 and is reproduced in
Table 11 and Table 12.
SELECT DR
1
0
0
1
1
SHIFT DR
EXIT1 DR
PAUSE DR
0
1
EXIT2 DR
UPDATE DR
1
1
0
0
0
0
TEST LOGIC
RESET
RUN TEST/
IDLE
1
0
SELECT IR
CAPTURE IR
1
0
0
1
1
SHIFT IR
EXIT1 IR
PAUSE IR
0
1
EXIT2 IR
UPDATE IR
1
1
0
0
0
0
TRST = 0
0
1
1
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