參數(shù)資料
型號： TTSI1K16T
廠商： Lineage Power
英文描述： 1024-Channel, 16-Highway Time-Slot Interchanger(1024通道、16路干線時隙交換機)
中文描述： 1024通道，16道時隙交換器（1024通道，16路干線時隙交換機）
文件頁數(shù)： 4/64頁
文件大小： 1110K
代理商： TTSI1K16T
TTSI2K32T
1024-Channel, 16-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
4
Lucent Technologies Inc.
List of Tables
Tables
Page
Table 1. Data Rate and Switch Size Examples....................................................................................................... 5
Table 2. Pin Assignments for a 144-Pin TQFP—Pin Number Order....................................................................... 8
Table 3. Pin Assignments for a 144-Pin TQFP—Signal Name Order..................................................................... 9
Table 4. TTSI1K16T Pin Descriptions................................................................................................................... 10
Table 5. The TSI Family........................................................................................................................................ 15
Table 6. Rx Highway Data Rate Options............................................................................................................... 18
Table 7. Tx Highway Data Rate Options............................................................................................................... 18
Table 8. Time-Slot Separation Required for Transmission with Minimum Latency (0 Offsets)............................. 23
Table 9. Offset Difference and Its Effect on Frame for Transmission.................................................................... 25
Table 10. Offset Difference Boundaries ................................................................................................................ 25
Table 11. TAP Controller States in the Data Register Branch............................................................................... 31
Table 12. TAP Controller States in the Instruction Register Branch...................................................................... 31
Table 13. TTSI1K16T’s Boundary-Scan Instructions ............................................................................................ 32
Table 14. TTSI1K16T Register Summary ............................................................................................................. 34
Table 15. General Command Register (0x00) ...................................................................................................... 36
Table 16. Software Reset Register (0x01) ............................................................................................................ 37
Table 17. BIST Command Register (0x02) ........................................................................................................... 37
Table 18. Idle Code 1 Register (0x03)................................................................................................................... 38
Table 19. Idle Code 2 Register (0x04)................................................................................................................... 38
Table 20. Idle Code 3 Register (0x05)................................................................................................................... 38
Table 21. Global Interrupt Mask Register (0x06)................................................................................................... 38
Table 22. Interrupt Status Register (0x07) ............................................................................................................ 39
Table 23. Interrupt Mask Register (0x08).............................................................................................................. 40
Table 24. Test Command Register (0x09) ............................................................................................................ 41
Table 25. Test-Pattern Style Register (0x0A)........................................................................................................ 42
Table 26. Test-Pattern Checker Highway Register (0x0B).................................................................................... 43
Table 27. Test-Pattern Checker Upper Time-Slot Register (0x0C)....................................................................... 43
Table 28. Test-Pattern Checker Lower Time-Slot Register (0x0D)....................................................................... 43
Table 29. Test-Pattern Checker Data Register (0x0E).......................................................................................... 43
Table 30. Test-Pattern Error Injection Register (0x0F).......................................................................................... 43
Table 31. Test-Pattern Error Counter (Byte 0) (0x10)........................................................................................... 44
Table 32. Test-Pattern Error Counter (Byte 1) (0x11)........................................................................................... 44
Table 33. Test-Pattern Generator Data Register (0x12) ....................................................................................... 44
Table 34. Version Register (0x13)......................................................................................................................... 44
Table 35. Transmit Highway Configuration Register (Byte 0) (0x1000 + 4i) ......................................................... 45
Table 36. Transmit Highway Configuration Register (Byte 1) (0x1001 + 4i) ......................................................... 46
Table 37. Transmit Highway Configuration Register (Byte 2) (0x1002 + 4i) ......................................................... 46
Table 38. Receive Highway Configuration Register (Byte 0) (0x1800 + 4i) .......................................................... 47
Table 39. Receive Highway Configuration Register (Byte 1) (0x1801 + 4i) .......................................................... 48
Table 40. Receive Highway Configuration Register (Byte 2) (0x1802 + 4i) .......................................................... 48
Table 41. Transmit Highway 3-State Options........................................................................................................ 49
Table 42. Address Scheme for Data Store Memory ............................................................................................. 50
Table 43. Address Scheme for Connection Store Memory .................................................................................. 50
Table 44. Connection Store Memory (Byte 0)....................................................................................................... 51
Table 45. Connection Store Memory (Byte 1)....................................................................................................... 51
Table 46. Clock Specifications .............................................................................................................................. 54
Table 47. Asynchronous Read and Write Interface Timing Using DT Handshake................................................ 55
Table 48. Asynchronous Microprocessor Interface Timing Using Only CS .......................................................... 56
Table 49. Synchronous Microprocessor Interface Timing..................................................................................... 58
Table 50. TDM Highway Timing............................................................................................................................ 59
Table 51. JTAG Interface Timing........................................................................................................................... 60
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TTSI1K16T3TL 制造商:AGERE 制造商全稱:AGERE 功能描述:1024-Channel, 16-Highway Time-Slot Interchanger
TTSI1K16T3TL-DB 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述:
TTSI2K32T 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger
TTSI2K32T3BAL 制造商:AGERE 制造商全稱:AGERE 功能描述:2048-Channel, 32-Highway Time-Slot Interchanger
TTSI4K32T 制造商:AGERE 制造商全稱:AGERE 功能描述:4096-Channel, 32-Highway Time-Slot Interchanger
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