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參數(shù)資料
| 型號： | TSB43AA82GGW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PBGA176 |
| 封裝： | PLASTIC, BGA-176 |
| 文件頁數(shù)： | 84/146頁 |
| 文件大?。?/td> | 770K |
| 代理商： | TSB43AA82GGW |
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316
3.4.17 ORB Fetch Control Register at 44h
This register defaults to 1008 0F00h and, except for the bits specified, is unaffected by a bus reset.
BITS
ACRONYM
DIR
DESCRIPTION
0
MAgtVld
R/W
Management agent register valid. When the host sets MAgtVld to 1, the Management_Agent_offset in the
management agent register (48h) is valid. If the management fetch agent receives the block write request
addressed to the management agent register, the management ORB is fetched automatically and written
to the MRF. When MAgtVld is set to 0, the Management_Agent_offset is invalid.
1
MAgtBsy
R/W
Management agent register busy. When the MAgtBsy bit is set to 1, a block write request addressed to the
management agent register is rejected ack_busy_x. When the host sets MAgtBsy to 0, the management
agent register can accept the block write request. This bit is cleared by the host.
2
Reserved
N/A
Reserved
3
MShtFmt
R/W
Management ORB in short format in MRF. When MShtFmt is set to 1, the receiver transforms the received
packets containing a fetched management ORB into a short format and places the transformed packet into
the MRF. When MShtFmt is set to 0, the receiver places the received packets containing a fetched
management ORB into MRF as is. This bit defaults to 1 and is unaffected by a bus reset. See Section 4.5.2
for more detail.
47
MORB_Prior
R/W
Management ORB transmission priority. The read request packet to fetch a management ORB has
MORB_Prior in the priority field.
815
CORB_Size
R/W
Command block ORB size. CORB_Size is the size in quadlets of the command block ORBs to be fetched.
This field defaults to 08h and is unaffected by a bus reset.
16
CAg0Vld
R/W
Register of command block agent0 valid. When the host sets CAg0Vld to 1, the Agent_base_offset in the
command agent register (4Ch) is valid. If the NodeID is assigned to agent0 by writing to the agent control
register (50h), the command block agent0 can receive write/read requests. When the block write request
is addressed to the ORB_POINTER register, the command block ORB is fetched automatically and
written to the CRF. Otherwise, if NodeID is not assigned to agent0, agent0 rejects any requests. When
CAg0Vld is set to 0, the command block Agent_Base_Offset is invalid.
17
CAg1Vld
R/W
Register of command block agent1 valid. See CAg0Vld.
18
CAg2Vld
R/W
Register of command block agent2 valid. See CAg0Vld.
19
CAg3Vld
R/W
Register of command block agent3 valid. See CAg0Vld.
20
DrBSnp
R/W
Doorbell snoop enable. When DrBSnp is set to 1 and the command block agent receives the quadlet write
request addressed to the DOORBELL register, the command block agent fetches the whole command
block ORB. When DrBSnp is set to 0 and the command block agent receives the quadlet write request
addressed to the DOORBELL register, the command block agent fetches only the next ORB field. This bit
defaults to 1 and is unaffected by a bus reset.
21
DrBFtEn
R/W
Doorbell fetch enable. When DrBFtEn is set to 1 and the command block agent receives the quadlet write
request addressed to the DOORBELL register, the command block ORB is automatically fetched and
stored into the CRF. The agent’s DrBll in the agent status register (5Ch) is set to 1. When DrBFtEn is set to
0 and the command block agent receives the quadlet write request to the DOORBELL register, the
command block ORB is not fetched automatically. The agent’s DrBll in the agent status register (5Ch) is
set to 1. This bit defaults to 1 and is unaffected by a bus reset.
22
CnxFtEn
R/W
Next command block ORB fetch enable. When CnxFtEn is set to 1 and the receiver receives a command
block ORB whose the next_ORB field of the command block ORB is not null, the next valid command block
ORB is fetched automatically. When CnxFtEn is set to 0 and the receiver receives a command block ORB
whose next_ORB field is not null, the next command block ORB is not fetched automatically. This bit
defaults to 1 and is unaffected by a bus reset.
23
CShtFmt
R/W
Command block ORB in short format in CRF. When CShtFmt is set to 1, the receiver transforms the
received packets containing a fetched command block ORB into a short format and places the
transformed packet into the CRF. Refer to Section 4.5.2. When CShtFmt is set to 0, the receiver must store
the received packets containing a fetched command block ORB into CRF as is. This bit defaults to 1 and is
unaffected by a bus reset.
24
CAg0Rdy
S/C
Command block agent 0 is ready to fetch the command block ORB. When command block agent is ready
to fetch the command block ORB, this bit is set to 1. When the host writes 1 on CAg0Rdy, it is set to 0 and
the agent fetches the command block ORB and places it into the CRF.
25
CAg1Rdy
S/C
Command block agent1 is ready to fetch the command block ORB. See CAg0Rdy.
26
CAg2Rdy
S/C
Command block agent2 is ready to fetch the command block ORB. See CAg0Rdy.
27
CAg3Rdy
S/C
Command block agent3 is ready to fetch the command block ORB. See CAg0Rdy.
2831
CORB_Prior
R/W
Command block ORB transmission priority. The read request packet to fetch a command block ORB has
CORB_Prior in the priority field.
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相關代理商/技術參數(shù) |
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|---|---|
| TSB43AA82GHH | 制造商:Texas Instruments 功能描述: |
| TSB43AA82I | 制造商:TI 制造商全稱:Texas Instruments 功能描述:1394 INTEGRATED PHY AND LINK LAYER CONTROLLER |
| TSB43AA82IGGW | 功能描述:1394 接口集成電路 2Port Hi Perf Integ Phy&Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB43AA82PGE | 功能描述:1394 接口集成電路 2Port Hi Perf Integ Phy&Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB43AA82PGEG4 | 功能描述:1394 接口集成電路 2Port Hi Per Int Phy & Link Layer Chip RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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