參數(shù)資料
型號: TMUX03155
英文描述: TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
中文描述: TMUX03155 STS-3/STM-1(非盟- 4)復(fù)用器/解復(fù)用器
文件頁數(shù): 59/120頁
文件大?。?/td> 1542K
代理商: TMUX03155
Agere Systems Inc.
59
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Microprocessor Interface
(continued)
Register Map
(continued)
Table 30. Registers 7—15: Delta/Event (COR-RO)
(continued)
Address
Dec (Hex)
12 (0x0C)
Bit
Name
Function
Reset
Default
0
0
RJ0Z0MOND
Receive Composite J0, Z0-2, Z0-3 Monitor Delta.
Delta bit indicates a change in state (RJ0MON[7:0],
0x1E,
RZ02MON[7:0], 0x1F,
RZ03MON[7:0], 0x20)
when a consecutive and consistent new value
(CNTDJ0Z0[3:0], 0x5A) is detected in the incoming
J0, Z0-2, Z0-3, bytes of the STS-3/STM-1 (AU-4)
frame. Its mask bit is RJ0Z0MONM, 0x15.
Receive High-Speed Null Pointer Indicator (NPI)
Delta.
Delta bit indicates a change in state
(RHSNPIMIS, 0x1D): a mismatch is declared when
five consecutive mismatches occur separated in
time by 125 μs in the received NPI value, a match is
declared when two consecutive valid NPI values
(byte 1 = 10011011, byte 2 = 11100000) are
received spaced 125 μs apart in the STM-1 (AU-4)
frame. Its mask bit is RHSNPIMISM, 0x16.
Receive High-Speed H4 Mismatch Event.
Event
bit indicates when the received H4 value does not
agree with the expected value. The sequence 00,
01, 10, and 11 should repeat in consecutive frames.
When a mismatch occurs, the device will accept
that new value + 1 as the expected value for the
next frame. Its mask bit is RHSH4MISM, 0x16
.
Receive RDI-P (G1 Byte) Delta.
Delta bit indicates
a change in state (RRDIP[3—1][2:0],
0x32—0x33)
when a consecutive and consistent new value
(CNTDG1[3:0], 0x5D) is detected in the incoming
G1[3:1] bits of the STS-3/STM-1 (AU-4) frame. Its
mask bit is RRDIPM[3—1],
0x16. The device will
either monitor G1 bit 3 as a path yellow
(RRDI_MPYorEFC
= 0) or G1 bits 3 down to 1 as an
enhanced failure code (RRDI_MPYorEFC
= 1)
under software control. Only port 1 information is
valid in AU-4 mode.
13 (0x0D)
7
RHSNPIMISD
0
13 (0x0D)
6
RHSH4MISE
0
13 (0x0D)
5—3
RRDIPD[3—1]
000
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