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參數(shù)資料
| 型號(hào)： | TMUX03155 |
| 英文描述： | TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer |
| 中文描述： | TMUX03155 STS-3/STM-1（非盟- 4）復(fù)用器/解復(fù)用器 |
| 文件頁(yè)數(shù)： | 38/120頁(yè) |
| 文件大小： | 1542K |
| 代理商： | TMUX03155 |
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38
Agere Systems Inc.
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Maintenance Functions
(continued)
Receive Functions
A number of the receive maintenance functions require a continuous N times detection (CNTD) of a signal to
change an alarm status. All of these continuous N times detect signals require not only that the monitored signal
be consistent for N consecutive frames, but also that the frame bytes, A1 and A2, be error free for all N frames
before the status can be updated. If there are any errors in the framing pattern, then the consecutive N times
detection counters must be reset to 0. N can range from 3 to 15. There is also a signal (
CNTDB1SEL, 0x5F
) that
will cause these continuous N times detection counters to be reset to 0 if there are any errors in the received B1
byte.
Continuous N Times Detect B1 Error Reset Enable
The following CNTD monitors are affected by this control bit (
CNTDB1SEL
):
1. AIS-L (K2[2:0] = 111)
2. RDI-L (K2[2:0] = 110)
3. K2MON (K2[2:0])
4. APSMON (K1[7:0], K02[7:3])
Receive Loss of Clock
The device will detect a receive loss-of-clock (
RILOC, 0x1B
) condition for the clock input and notify the control sys-
tem of any changes to this condition (
RILOCD, 0x0A,
and
RILOCM, 0x13
).
Insertion of Line AIS (Automatic/Manual)
The device will write Line AIS into each STS-1/AU-3 output signal if either the appropriate alarms occur or the soft-
ware insert bit is active.
LAIS_COMMON = ((
RILOC
AND
RRILOC_AISINH
) OR
(
RRHSOOF
AND
RHSOOF_AISINH
) OR
(
RHSLOF
AND
RRHSLOF_AISINH
) OR
(
RHSLOS
AND
RRHSLOS_AISINH
) OR
(
LAISMON
AND
RRLAISMON_AISINH
));
(See 0x1B, 0x58.)
If (
RLAISINS[3—1]
= 1 OR LAIS_COMMON = 1), then insert Line AIS on the selected output.
When a
RILOC
condition exists, the transmit clock is used to generate the Line AIS signal downstream, if possible.
Insertion of Path AIS (Automatic)
The device will write Path AIS into each STS-1/AU-3 output signal if the appropriate alarms occur.
PAIS_COMMON[3—1] = (
(PAIS[3—1]
OR
LOP[3—1]
) AND
PAISLOP_AISINH
)
If (PAIS_COMMON[3—1] = 1), then insert Path AIS on the appropriate output. (PAIS consists of writing all ones
into the H1, H2, H3 bytes, and into the entire payload.)
B1 BIP-8 Parity
The device will perform B1 (BIP-8) calculation and error checking in the receive path. The device will allow access
to the B1 errored bit/block (one block is equal to one frame) count (
BITBLOCKCNT, 0x34,
RHSB1ECNT[15:0],
0x8D-0x8E
). This counter will update when
LATCH_CNT
transitions from a logic 0 to a logic 1.
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