參數(shù)資料
型號: TMUX03155
英文描述: TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
中文描述: TMUX03155 STS-3/STM-1(非盟- 4)復(fù)用器/解復(fù)用器
文件頁數(shù): 27/120頁
文件大?。?/td> 1542K
代理商: TMUX03155
Agere Systems Inc.
27
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Receive Direction Overview
(continued)
STS-1/AU-3 Output Scramble
The device allows scrambling of the output signals on a per-output basis (
RLSSCR[3—1], 0x57
).
Output Selection Logic
The demultiplexed signals can be routed to any output port or can be multicast to more than one port. The control
bits (
RSEL[3—1][1:0], 0x56
) allow this to occur under software control. See Table 10.
Output Data Formatter
The device outputs one clock at 19.44 MHz, one J0 time signal, an 8-bit data bus, and an odd/even
(
RPLSPAROEG, 0x57
) parity bit. The bus can be shared with up to three other devices. Each device determines
its time slot using the J0 time signal. The byte coincident with the J0 time sync signal is always available for device
number 1. Subsequent bytes are available for device 2, device 3, and then device 1 again. The sense of the
19.44 MHz output clock can be inverted under user control (
RLSCLKINV, 0x57
).
Maintenance Functions
Maintenance functions are associated with monitoring signals and conditions in the device. This section is divided
into a common section, a transmit section, and a receive section.
Table 10. STS-1/AU-3 Output Select Control
RSEL
[3—1][1:0]
Output
00 (0)
01 (1)
10 (2)
11 (3)
STS-1/AU-3 #1 Receive
STS-1/AU-3 #2 Receive
STS-1/AU-3 #3 Receive
Undefined
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