參數(shù)資料
型號: TMUX03155
英文描述: TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
中文描述: TMUX03155 STS-3/STM-1(非盟- 4)復(fù)用器/解復(fù)用器
文件頁數(shù): 55/120頁
文件大小: 1542K
代理商: TMUX03155
Agere Systems Inc.
55
Data Sheet
April 2001
TMUX03155 STS-3/STM-1 (AU-4) Multiplexer/Demultiplexer
Microprocessor Interface
(continued)
Register Description
(continued)
Table 28. Registers 4, 5: One-Shot Register 0
1 (R/W)
(continued
)
Table 29. Register 6: Scratch Register (R/W)
Table 30. Registers 7—15: Delta/Event (COR-RO)
Address
Dec (Hex)
4 (0x04)
Bit
Name
Function
Reset
Default
0
1
RSTCTL
Reset Control (Software).
Resets the device. This
reset has the same effect as the external
RESET
pin. This is a service affecting action. All state
machines and registers bits will revert to their
default values.
Latch Count.
Causes all counters to latch their val-
ues and clear their internal counters, except the test
drop counter. These counters are large enough to
hold at least one second’s worth of data.
Receive A1/A2 Error Enable.
Inserts framing
errors into the respective output STS-1/AU-3 signal.
4 (0x04)
0
LATCH_CNT
0
5 (0x05)
7
RA1A2ERREN
0
Address
Dec (Hex)
6 (0x06)
Bit
Name
Function
Reset
Default
0x00
7—0
SCRATCH [7:0]
Scratch Register.
Allows the control system to
verify read and write operations to the device
without affecting device operation.
Address
Dec (Hex)
7 (0x07)
Bit
Name
Function
Reset
Default
0
7
TILOCFD
Transmit Input Loss of Clock and Frame Delta.
Delta bit indicates a change of state for the local
clock (TILOC, 0x19) or frame sync (TILOF, 0x19).
The delta bit clears when read. Its mask bit is
TILOCFM,
0x10.
Note:
The TILOF state is not supported in version
3 of the device.
Transmit Transport Overhead Access Channel
(TOAC) Parity Error Event.
Event register
indicates a parity error was detected on the
incoming transmit section overhead access
channel. The bit will be cleared when read, but will
be set again if the condition persists. Its mask bit is
TTOAC_PERRM,
0x10.
Transmit Low-Speed Parity Error Event (Input
Port Number).
Indicates a byte transfer parity error
on the respective STS-1/AU-3 input. These bits will
clear when read, but will be set again if the condi-
tion persists. Their mask bits are TLSPARM[3—1],
0x10.
7 (0x07)
3
TTOAC_PERRE
0
7 (0x07)
2—0
TLSPARE[3—1]
000
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