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參數(shù)資料
| 型號(hào)： | STV9118 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | LOW-COST I2C CONTROLLED DEFLECTION PROCESSOR FOR MULTISYNC MONITOR |
| 中文描述： | 低費(fèi)用的I2C可控?fù)隙榷嗤斤@示器處理器 |
| 文件頁數(shù)： | 29/46頁 |
| 文件大小： | 577K |
| 代理商： | STV9118 |
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STV9118
29/46
generated from the output vertical deflection drive
waveform, they both track with real vertical ampli-
tude and position (including breathing compensa-
tion), thus being fixed on the screen. Refer to
I
2
C
BUS CONTROL REGISTER MAP
on
page 21
for
details on I
2
C bus controls.
Figure 7.
Horizontal timing diagram
Figure 8.
HFly input configuration
10.3.6 - Output Section
The H-drive signal is inhibited (high level) during
flyback pulse, and also when
V
CC
is too low, when
X-ray protection is activated (
XRayAlarm
I
2
C bus
flag set to 1) and when I
2
C bus bit
HBOutEn
is set
to 0 (default position).
The duty cycle of the H-drive signal is controlled
via I
2
C bus register
HDUTY
. This is overruled dur-
ing soft-start and soft-stop procedures (see sub
chapter
Soft-start and soft-stop on H-drive
on
page 29
and
Figure 10
).
The PLL2 is followed by a rapid phase shifting
which accepts the signal from H-moiré canceller
(see sub chapter
Horizontal moiré cancellation
on
page 29
)
The output stage consists of a NPN bipolar tran-
sistor, the collector of which is routed to
HOut
pin
(see
Figure 9
).
Figure 9.
HOut configuration
Non-conductive state of HOT (Horizontal Output
Transistor) must correspond to non-conductive
state of the device output transistor.
10.3.7 - Soft-start and soft-stop on H-drive
The soft-start and soft-stop procedure is carried
out at each switch-on or switch-off of the H-drive
signal, either via
HBOutEn
I
2
C bus bit or after re-
set of
XRayAlarm
I
2
C bus flag, to protect external
power components. By its second function, the ex-
ternal capacitor on pin
HPosF
is used to time out
this procedure, during which the duty cycle of H-
drive signal starts at its maximum (“
t
Hoff
/T
H
for soft
start/stop” in electrical specifications) and slowly
decreases to the value determined by the control
I
2
C bus register
HDUTY
(vice versa at soft-stop).
This is controlled by voltage on pin
HPosF
. See
Figure 10
and sub chapter
Safety functions
on
page 36
.
10.3.8 - Horizontal moiré cancellation
The horizontal moiré canceller is intended to blur a
potential beat between the horizontal video pixel
period and the CRT pixel width, which causes vis-
ible moiré patterns in the picture.
On pin
HMoiré
, in position “External” of I
2
C bus bit
HMoiMode
, it generates a square line-synchro-
nized waveform with amplitude adjustable through
HMOIRE
I
2
C bus control. In position “Internal” of
I
2
C bus bit
HMoiMode
, it introduces a microscopic
indent on horizontal scan lines by injecting little
controlled phase shifts to output circuitry of the
horizontal section. Their amplitude is adjustable
through
HMOIRE
I
2
C bus control.
Only one H-moiré, internal or external, is generat-
ed at a time.
H-flyback
PLL2
control
H-drive
(on HOut)
current
V
ThrHFly
+
-
t
S
t
Hoff
H-drive
region
H-drive
region
t
ph(max)
inhibited
t
S
: HOT storage time
H-Osc
(VCO)
V
S(0)
7/8T
H
T
H
V
HOThrHi
max.
med.
min.
V
HPosF
H-sync
(polarized)
REF1
(internal)
t
Hph
min
max
HPOS
(I
2
C)
max.
med.
min.
PLL1 lock
V
HOThrLo
P
P
ON
forced high
forced low
OFF
ON
GND
~20k
HFly 12
~500
int.
ext.
26
int.
ext.
HOut
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