參數資料
型號: STPCE1HDC
英文描述: Microprocessor
中文描述: 微處理器
文件頁數: 76/87頁
文件大小: 1356K
代理商: STPCE1HDC
DESIGN GUIDELINES
76/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
Release 1.3 - January 29, 2002
6.4.3.3. Board Layout Issues
The physical layout of the motherboard PCB
assumed in this presentation is as shown in
Figure
6-22
. For the PCI interface, the most critical signal
is the clock. Any skew between the clocks at the
PCI components and the STPC will impact the
timing budget. In order to get well matched clocks
at all components it is recommended that all the
PCI clocks are individually driven from a serial
resistance with matched routing lengths. In other
words, all clock line lengths that go from the
resistor to the PCI chips (PCICLKx) must be
identical.
The figure below is for PCI devices soldered on-
board. In the case of a PCI slot, the wire length
must be shortened by 2.5" to compensate the
clock layout on the PCI board. The maximum
clock skew between all devices is 2ns according
to PCI specifications.
The
Figure 6-23
describes a typical clock delay
implementation. The exact timing constraints are
listed in the PCI section of the
Electrical
Specifications
Chapter.
Figure 6-22. Typical PCI clock routing
Length(PCICLKI) = Length(PCICLKx) with x = {A,B,C}
Note: The value of 22 Ohms corresponds to tracks with Z
0
= 70 Ohms.
PCICLKI
PCICLKO
PCICLKA
PCICLKB
PCICLKC
Device A
Device B
Device C
Figure 6-23. Clocks relationships
PCICLKO
PCICLKI
HCLK
PCICLKx
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相關代理商/技術參數
參數描述
STPCE1HEBC 功能描述:微處理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324
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