參數(shù)資料
型號(hào): STPCE1HDC
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 11/87頁
文件大小: 1356K
代理商: STPCE1HDC
PIN DESCRIPTION
Release 1.3 - January 29, 2002
11/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
2. PIN DESCRIPTION
2.1. INTRODUCTION
The STPC Elite integrates most of the
functionalities of the PC architecture. As a result,
many of the traditional interconnections between
the host PC microprocessor and the peripheral
devices are totally internal to the STPC Elite. This
offers improved performance due to the tight
coupling of the processor core and these
peripherals. As a result many of the external pin
connections are made directly to the on-chip
peripheral functions.
Figure 2-1
shows the STPC Elite external
interfaces. It defines the main buses and their
function.
Table 2-1
describes the physical
implementation listing signals type and their
functionality.
Table 2-2
provides a full pin listing
and description of pins.
Table 2-7
provides a full
listing of pin locations of the STPC Elite package
by physical connection.
Note:
Several interface pins are multiplexed with
other functions, refer to
Table 2-4
and
Table 2-5
for further details
Table 2-1. Signal Description
Group name
Qty
Basic Clocks reset & Xtal
Memory Interface
PCI interface
ISA
IDE
Local Bus
Grounds
V
DD
Miscellaneous
GPIO
Unconnected
Total Pin Count
6
96
56
79
34
50
90
69
22
8
16
25
388
Figure 2-1. STPC Elite External Interfaces
SOUTH
NORTH
PCI
x86
SDRAM I/F
SYS
ISA/IDE/LB
96
56
6
90
STPC Elite
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