- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄381118 > STPCE1EDBI (意法半導(dǎo)體) X86 Core General Purpose PC Compatible System - on - Chip PDF資料下載
參數(shù)資料
| 型號(hào)： | STPCE1EDBI |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | X86 Core General Purpose PC Compatible System - on - Chip |
| 中文描述： | x86內(nèi)核兼容的通用計(jì)算機(jī)系統(tǒng)-關(guān)于-芯片 |
| 文件頁(yè)數(shù)： | 39/87頁(yè) |
| 文件大小： | 1356K |
| 代理商： | STPCE1EDBI |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)當(dāng)前第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)
ELECTRICAL SPECIFICATIONS
Release 1.3 - January 29, 2002
39/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
4.5.2 RESET SEQUENCE
Figure 4-4
describes the reset sequence of the
STPC, also called warm reset.
The constraints on the strap options and the bus
activities are the same as for the cold reset.
The SYSRSTI# pulse duration must be long
enough to have all the strap options stabilized and
must be adjusted depending on resistor values.
Figure 4-4. Reset timing diagram
It is mandatory to have a clean reset pulse without
glitches as the STPC could then sample invalid
strap option setting and enter into an umpredicta-
ble mode.
While SYSRSTI# is active, the PCI clock PLL runs
in open loop mode at a speed of few 100’s KHz.
Strap Options
SYSRSTI#
SYSRSTO#
14 MHz
VALID CONFIGURATION
HCLK
PCI_CLK
2.3 ms
ISACLK
1.6 V
MD[63:0]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| STPCE1EEBC | X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1EEBI | X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HEBC | X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HEBI | X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDBC | X86 Core General Purpose PC Compatible System - on - Chip |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| STPCE1EEBC | 制造商:STMicroelectronics 功能描述:X86 CORE PC COMPATIBLE INFORMATION APPLIANCE SYSTEM-ON-CHIP - Bulk |
| STPCE1EEBI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDBC | 制造商:STMicroelectronics 功能描述:X86 GENERAL PURPOSE CONTROLLER - Bulk |
| STPCE1HDBI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microprocessor |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。