參數(shù)資料
型號(hào): STPCE1EDBI
廠商: 意法半導(dǎo)體
英文描述: X86 Core General Purpose PC Compatible System - on - Chip
中文描述: x86內(nèi)核兼容的通用計(jì)算機(jī)系統(tǒng)-關(guān)于-芯片
文件頁(yè)數(shù): 29/87頁(yè)
文件大?。?/td> 1356K
代理商: STPCE1EDBI
STRAP OPTION
Release 1.3 - January 29, 2002
29/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
3.1.2. STRAP REGISTER 1 CONFIGURATION
Strap1
Access = 0022h/0023h
Regoffset = 04Bh
7
6
5
4
3
2
1
0
Rsv
MD11
MD10
Rsv
This register defaults to the values sampled on MD[11:10] pins after reset
Bit Number Sampled
Mnemonic
Description
Bits 7-6
Rsv
Reserved
Bits 5-4
Rsv
Reserved
Bit 3
MD11
Reserved
Bit 2
MD10
Reserved
Bits 1-0
Rsv
Reserved.
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