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參數資料

型號：	STPCE1EDBI
廠商：	意法半導體
英文描述：	X86 Core General Purpose PC Compatible System - on - Chip
中文描述：	x86內核兼容的通用計算機系統-關于-芯片
文件頁數：	2/87頁
文件大?。?/td>	1356K
代理商：	STPCE1EDBI

2/87

Release 1.3 - January 29, 2002

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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X86 Processor core

Fully static 32-bit 5-stage pipeline, x86

processor fully PC compatible.

Can access up to 4GB of external memory.

8KByte unified instruction and data cache

with write back and write through capability.

Parallel processing integral floating point unit,

with automatic power down.

Clock core speeds up to of 100 MHz in x1

clock mode and 133MHz in x2 mode.

Fully static design for dynamic clock control.

Low power and system management modes.

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SDRAM Controller

64-bit data bus.

Up to 100MHz SDRAM clock speed.

Supports up to 128 MB system memory.

Supports 16-, 64- and 128-Mbit memories.

Supports up to 4 memory banks.

Supports buffered, non buffered, registered

DIMMs

4-line write buffers for CPU to DRAM and PCI

to DRAM cycles.

4-line read prefetch buffers for PCI masters.

Programmable latency

Programmable timing for DRAM parameters.

Supports -8, -10, -12, -13, -15 memory parts

Supports memory hole between 1MB and

8MB for PCI/ISA busses.

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PCI Controller

Compliant with PCI 2.1 specification.

Integrated PCI arbitration interface. Up to 3

masters can connect directly. External logic

allows for greater than 3 masters.

Translation of PCI cycles to ISA bus.

Translation of ISA master initiated cycle to

PCI.

Support for burst read/write from PCI master.

0.25X, 0.33X and 0.5X Host clock PCI clock.

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ISA master/slave

Generates the ISA clock from either

14.318MHz oscillator clock or PCI clock

Supports programmable extra wait state for

ISA cycles

Supports I/O recovery time for back to back

I/O cycles.

Fast Gate A20 and Fast reset.

Supports the single ROM that C, D, or E.

blocks shares with F block BIOS ROM.

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Supports flash ROM.

Supports ISA hidden refresh.

Buffered DMA & ISA master cycles to reduce

bandwidth utilization of the PCI and Host

bus. NSP compliant.

16-bit I/O decoding.

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Local Bus interface

Multiplexed with ISA/DMA/Timer functions.

High speed, low latency bus.

Supports 32-bit Flash burst.

16-bit data bus with word steering capability.

Separate memory and I/O address spaces.

Programmable timing (Host clock granularity)

Supports 2 cachable banks of 16MB flash

devices with boot block shadowed to

0x000F0000.

2 Programmable Flash/EPROM Chip Select.

4 Programmable I/O Chip Select.

2-level hardware key protection for Flash boot

block protection.

24 bit address bus.

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EIDE Controller

Compatible with EIDE (ATA-2).

Backward compatibility with IDE (ATA-1).

Supports up to 4 IDE devices

Supports PIO and Bus Master IDE

Concurrent channel operation (PIO & DMA

modes) - 4 x 32-Bit Buffer FIFO per channel

Support for 11.1/16.6 MB/s, I/O Channel

Ready PIO data transfers.

Bus Master with scatter/gather capability.

Multi-word DMA support for fast IDE drives.

Individual drive timing for all four IDE devices.

Supports both legacy & native IDE modes.

Supports hard drives larger than 528MB.

Support for CD-ROM and tape peripherals.

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Integrated Peripheral Controller

2X8237/AT compatible 7-channel DMA

controller.

2X8259/AT compatible interrupt Controller.

16 interrupt inputs - ISA and PCI.

Three 8254 compatible Timer/Counters.

Co-processor error support logic.

Supports external RTC.

Power Management

Four power saving modes: On, Doze,

Standby, Suspend.

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相關PDF資料	PDF描述
STPCE1EEBC	X86 Core General Purpose PC Compatible System - on - Chip
STPCE1EEBI	X86 Core General Purpose PC Compatible System - on - Chip
STPCE1HEBC	X86 Core General Purpose PC Compatible System - on - Chip
STPCE1HEBI	X86 Core General Purpose PC Compatible System - on - Chip
STPCE1HDBC	X86 Core General Purpose PC Compatible System - on - Chip

相關代理商/技術參數	參數描述
STPCE1EEBC	制造商:STMicroelectronics 功能描述:X86 CORE PC COMPATIBLE INFORMATION APPLIANCE SYSTEM-ON-CHIP - Bulk
STPCE1EEBI	制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip
STPCE1HDBC	制造商:STMicroelectronics 功能描述:X86 GENERAL PURPOSE CONTROLLER - Bulk
STPCE1HDBI	制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip
STPCE1HDC	制造商:未知廠家制造商全稱:未知廠家功能描述:Microprocessor

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