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參數(shù)資料
| 型號： | STPCC0166BTI3 |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA388 |
| 封裝： | PLASTIC, BGA-388 |
| 文件頁數(shù)： | 10/71頁 |
| 文件大?。?/td> | 1238K |
| 代理商： | STPCC0166BTI3 |
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PIN DESCRIPTION
18/71
Issue 2.4 - November 8, 2001
ZWS# Zero Wait State. This signal, when assert-
ed by addressed device, indicates that current cy-
cle can be shortened.
IOCHCK#
IO Channel Check. IO Channel Check
is enabled by any ISA device to signal an error
condition that can not be corrected. NMI signal be-
comes active upon seeing IOCHCK# active if the
corresponding bit in Port B is enabled.
ISAOE# Bidirectional OE Control. This signal con-
trols the OE signal of the external transceiver that
connects the IDE DD bus and ISA SA bus.
GPIOCS# I/O General Purpose Chip Select 1.
This output signal is used by the external latch on
ISA bus to latch the data on the SD[7:0] bus. The
latch can be use by PMU unit to control the exter-
nal peripheral devices to power down or any other
desired function.
2.2.9 IDE CONTROL
PIRQ Primary Interrupt Request. Interrupt request
from primary IDE channel.
SIRQ Secondary Interrupt Request. Interrupt re-
quest from secondary IDE channel.
PDRQ Primary DMA Request. DMA request from
primary IDE channel.
SDRQ Secondary DMA Request. DMA request
from secondary IDE channel.
PDACK# Primary DMA Acknowledge. DMA ack-
noledge to primary IDE channel.
SDACK# Secondary DMA Acknowledge. DMA
acknoledge to secondary IDE channel.
PIOR# Primary I/O Read. Primary channel read.
Active low output.
PIOW# Primary I/O Write. Primary channel write.
Active low output.
SIOR# Secondary I/O Read Secondary channel
read. Active low output.
SIOW# Secondary I/O Write Secondary channel
write. Active low output.
2.2.10 IPC
IRQ_MUX[3:0] Multiplexed Interrupt Request.
These are the ISA bus interrupt signals. They are
to be encoded before connection to the STPC
Consumer using ISACLK and ISACLKX2 as the
input selection strobes.
Note that IRQ8B, which by convention is connect-
ed to the RTC, is inverted before being sent to the
interrupt controller, so that it may be connected di-
rectly to the IRQ pin of the RTC.
PCI_INT[3:0] PCI Interrupt Request. These are
the PCI bus interrupt signals. They are to be en-
coded before connection to the STPC Consumer
using ISACLK and ISACLKX2 as the input selec-
tion strobes.
DREQ_MUX[1:0] ISA Bus Multiplexed DMA Re-
quest. These are the ISA bus DMA request sig-
nals. They are to be encoded before connection to
the
STPC
Consumer
using
ISACLK
and
ISACLKX2 as the input selection strobes.
DACK_ENC[2:0] DMA Acknowledge. These are
the ISA bus DMA acknowledge signals. They are
encoded by the STPC Consumer before output
and should be decoded externally using ISACLK
and ISACLKX2 as the control strobes.
TC ISA Terminal Count. This is the terminal count
output of the DMA controller and is connected to
last DMA transfer, when the byte count expires.
SPKRD Speaker Drive. This the output to the
speaker and is AND of the counter 2 output with
bit 1 of Port 61, and drives an external speaker
driver. This output should be connected to 7407
type high voltage driver.
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