參數(shù)資料
型號： STE2004S
廠商： 意法半導體
英文描述： M16C; M16C/60 Series; Microcontroller; Bit Size: 32/16-bit CISC; ROM: 320K; RAM: 31K; ROM Type: Mask ROM; CPU: M16C/60 core; Minimum Instruction Execution Time (ns): 41.7 (@24MHz); Operating Frequency / Supply Voltage: 24MHz/3.0 to 5.5V, 10MHz/2.7 to 5.5V; Operating Ambient Temperature (°C): -20 to 85, -40 to 85; Package Code: PLQP0128KB-A (128P6Q-A)
中文描述： 102 × 65的單芯片LCD控制器/驅動器
文件頁數(shù)： 38/79頁
文件大?。?/td> 1123K
代理商： STE2004S
Bus interfaces
STE2004S
38/79
Figure 40.
3-lines SPI reading sequence
4.2.3
3-lines 9 bits serial interface
The STE2004S 3-lines serial interface is a bidirectional link between the display driver and
the application supervisor.
It consists of three lines: one/two for data signals (SDIN, SDOUT), one for clock signals
(SCLK) and one for peripheral enable (CS).
The serial interface is active only if the CS line is set to a logic 0. When CS line is high the
serial peripheral power consumption is zero. While CS pin is high the serial interface is kept
in reset.
The STE2004S is always a slave on the bus and receives the communication clock on the
SCLK pin from the master.
Information is exchanged word-wide. The word is composed of 9 bits. The first bit is named
SD/C and indicates whether the following byte is a command (SD/C =0) or data byte (SD/C
=1). During data transfer, the data line is sampled on the positive SCLK edge.
If CS stays low after the last bit of a command/data byte, the serial interface expects the
SD/C bit of the next word at the next SCLK positive edge. A reset pulse on RES pin
interrupts the transmission. No data is written into the data RAM and all the internal
registers are cleared. If CS is low after the positive edge of RES, the serial interface is ready
to receive data.
Throughout SDOUT, only the driver I
2
C slave address or the status byte can be read. The
command sequence that the I
2
C slave address or status byte to be read is shown in
Figure
43.
and
Figure 44.
. SDOUT is in high impedance in steady state and during data write.
READING SEQUENCE
Set Co bit =1, D/C Bit =0 R/W Bit =1
Source 8 pulses on SCLK and
Read the
ID-Number
or the Status Byte On SDOUT
END OF READING SEQUENCE
SDOUT Buffer Configured in High Impedence
LR0079
SDOUT Buffer become active (Low Impedence)
1
note: 1) these data are not read by the display Diver
2) SDIN and SDOUT can be short circuited if the processor can configure
serial output buffers in high impedence during data read
.
相關PDF資料
PDF描述
STE2004SDIE2 102 x 65 single-chip LCD controller/driver
STE2130S 240RGB x 320 single chip true 262K color controller/driver
STE26NA90 N-Channel 900V-0.25Ω-26A-ISOTOP Fast Power MOSFET(N溝道快速功率MOSFET)
STE36N50 N-CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR IN ISOTOP PACKAGE
STE38NB50 N-Channel 500V-0.11Ω-38A- ISOTOP PowerMESHTM MOSFET(N溝道MOSFET)
相關代理商/技術參數(shù)
參數(shù)描述
STE2004SDIE2 制造商:STMicroelectronics 功能描述:
STE2007 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:96 x 68 Single-chip LCD controller/driver
STE2007_06 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:96 x 68 Single-chip LCD controller/driver
STE2007DIE2 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:96 x 68 Single-chip LCD controller/driver
STE200GRL 制造商:Thomas & Betts 功能描述:Fittings Locknut 2inch Female
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