
C165H
Architectural Overview
Data Sheet
42
2001-04-19
PRELMNARY
them. PORT0 and PORT1 may be used as address and data lines when accessing
external memory, while Port 4 outputs the additional segment address bits A22/A19/
A17...A16 in systems where segmentation is used to access more than 64 KBytes of
memory. Port 6 provides optional bus arbitration signals (BREQ, HLDA, HOLD) and chip
select signals. Port 2 accepts the fast external interrupt inputs. Port 3 includes alternate
functions of timers, serial interfaces, the optional bus control signal BHE and the system
clock output (CLKOUT). Port 7 is used for general purpose I/Os. All port lines that are
not used for these alternate functions may be used as general purpose I/O lines.
-EXCERPT-
indirect or direct addressing with
16-bit (mem) addresses
it must be guaranteed that
the used data page pointer (DPP0...DPP3) selects data page 3.
accesses via the Peripheral Event Controller (
PEC
) use the SRCPx and DSTPx
pointers instead of the data page pointers
short 8-bit (reg) addresses
to the standard SFR area do not use the data page
pointers but directly access the registers within this 512 Byte area.
short 8-bit (reg) addresses
ESFR
area require switching to the 512
Byte extended SFR area. This is done via the EXTension instructions EXTR,
EXTP(R), EXTS(R).
Byte write operations
to word wide SFRs via indirect or direct 16-bit (mem) addressing
or byte transfers via the PEC force zeros in the non-addressed byte. Byte write
operations via short 8-bit (reg) addressing can only access the low byte of an SFR and
force zeros in the high byte. It is therefore recommended, to use the bit field instructions
(BFLDL and BFLDH) to write to any number of bits in either byte of an SFR without
disturbing the non-addressed byte and the unselected bits.
Reserved Bits
Some of the bits which are contained in the C165H's SFRs are marked as 'Reserved'.
User software should never write '1's to reserved bits. These bits are currently not
implemented and may be used in future products to invoke new functions. In this case,
the active state for these functions will be '1', and the inactive state will be '0'. Therefore
writing only ‘0’s to reserved locations provides portability of the current software to future
devices. Read accesses to reserved bits return ‘0’s.
Parallel Ports
The C165H provides up to 72 I/O lines which are organized into seven input/output ports.
All port lines are bit-addressable, and all input/output lines are individually (bit-wise)
programmable as inputs or outputs via direction registers. The I/O ports are true
bidirectional ports which are switched to high impedance state when configured as
inputs. The output drivers of three I/O ports can be configured (pin by pin) for push/pull
operation or open-drain operation via control registers. During the internal reset, all port
pins are configured as inputs.