參數(shù)資料
型號(hào)： SAF7118H
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： Multistandard video decoder with adaptive comb filter and component video input
封裝： SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù)： 70/175頁
文件大?。?/td> 898K
代理商： SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
70 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
9.2 Audio clock signals
The SAF7118 also synchronizes the audio clock and sampling rate to the video frame
rate, via a very slow PLL. This ensures that the multimedia capture and compression
processes always gather the same predefined number of samples per video frame.
An audio master clock AMCLK and two divided clocks ASCLK and ALRCLK are
generated:
ASCLK: can be used as audio serial clock
ALRCLK: audio left/right channel clock
The ratios are programmable; see
Section 8.7
.
[1]
Pin numbers for QFP160 in parenthesis.
9.3 Clock and real-time synchronization signals
For the generation of the line-locked video (pixel) clock LLC, and of the frame-locked
audio serial bit clock, a crystal accurate frequency reference is required. An oscillator is
built-in for fundamental or third harmonic crystals. The supported crystal frequencies are
32.11 MHz or 24.576 MHz (defined during reset by strapping pin ALRCLK).
Alternatively pin XTALI can be driven from an external single-ended oscillator.
The crystal oscillation can be propagated as a clock to other ICs in the system via
pin XTOUT.
The Line-Locked Clock (LLC) is the double pixel clock of nominal 27 MHz. It is locked to
the selected video input, generating baseband video pixels according to “ITU
recommendation 601” In order to support interfacing circuits, a direct pixel clock (LLC2) is
also provided.
Table 26.
Symbol
AMCLK
Audio clock pin description
Pin
[1]
I/O Description
P11
(72)
AMXCLK M12
(76)
Bit
ACPF[17:0] 32h[1:0] 31h[7:0] 30h[7:0] and
ACNI[21:0] 36h[5:0] 35h[7:0] 34h[7:0]
O
audio master clock output
I
externalaudio master clock
input for the clock division
circuit, can be directly
connected to output
AMCLK for standard
applications
serial audio clock output,
can be synchronized to
rising or falling edge of
AMXCLK
audio channel (left/right)
clock output, can be
synchronized to rising or
falling edge of ASCLK
ASCLK
N11
(74)
O
SDIV[5:0] 38h[5:0] and SCPH[3Ah[0]]
ALRCLK
P12
(75)
O
LRDIV[5:0] 39h[5:0] and LRPH[3Ah[1]]
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAF7118H/V1,557 功能描述:視頻 IC COMPONENT VID DECODR RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder
SAF7129AH/V1 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH/V1,518 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH/V1,557 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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