參數(shù)資料
型號(hào)： SAF7118H
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： Multistandard video decoder with adaptive comb filter and component video input
封裝： SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù)： 133/175頁
文件大?。?/td> 898K
代理商： SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
133 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
10.7.6
Subaddresses 91h to 93h
[1]
X = don’t care.
[1]
X = don’t care.
[2]
FSC2 and FSC1 only to be used, if X port input source does not provide chroma information for every input line. X port input stream
must contain dummy chroma bytes.
Table 111. X port formats and configuration; register set A [91h[7:3]] and B [C1h[7:3]]
[1]
Scaler input format and configuration source selection
Control bits D7 to D3
CONLV
HLDFV
X
X
SCSRC1 SCSRC0 SCRQE
X
X
Only if XRQT[83h[2]] = 1: scaler input source reacts on SAF7118
request
Scaler input source is a continuous data stream, which cannot be
interrupted (must be logic 1, if SAF7118 decoder part is source of
scaler or XRQT[83h[2]] = 0)
Scaler input source is data from decoder, data type is provided
according to
Table 15
Scaler input source is Y-C
B
-C
R
data from X port
Scaler input source is raw digital CVBS from selected analog
channel, for backward compatibility only, further use is not
recommended
Scaler input source is raw digital CVBS (or 16-bit Y + C
B
-C
R
, if no
16-bit outputs are active) from X port
SAV/EAV code bits D6 and D5 (F and V) may change between
SAV and EAV
SAV/EAV code bits D6 and D5 (F and V) are synchronized to
scalers output line start
SAV/EAV code bit D5 (V) and V gate on pin IGPV as generated by
the internal processing; see
Figure 47
SAV/EAV code bit D5 (V) and V gate are inverted
0
X
X
X
X
1
X
X
0
0
X
X
X
X
X
0
1
1
0
X
X
X
X
1
1
X
X
0
X
X
X
X
1
X
X
X
0
X
X
X
X
1
X
X
X
X
Table 112. X port formats and configuration; register set A [91h[2:0]] and B [C1h[2:0]]
[1]
Scaler input format and configuration format control
Control bits D2 to D0
FSC2
[2]
X
X
0
0
1
1
FSC1
[2]
X
X
0
1
0
1
FSC0
0
1
X
X
X
X
Input is Y-C
B
-C
R
4 : 2 : 2 like sampling scheme
Input is Y-C
B
-C
R
4 : 1 : 1 like sampling scheme
Chroma is provided every line, default
Chroma is provided every 2nd line
Chroma is provided every 3rd line
Chroma is provided every 4th line
Table 113. X port input reference signal definitions; register set A [92h[7:4]] and B [C2h[7:4]]
[1]
X port input reference signal definitions
Control bits D7 to D4
XFDV
X
X
X
XFDH
X
X
X
XDV1
X
X
0
XDV0
0
1
X
Rising edge of XRV input and decoder V123 is vertical reference
Falling edge of XRV input and decoder V123 is vertical reference
XRV is a V-sync or V gate signal
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SAF7129AH/V1,518 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
SAF7129AH/V1,557 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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