參數(shù)資料
型號(hào)： SAF7118H
廠商： NXP Semiconductors N.V.
元件分類： 通用總線功能
英文描述： Multistandard video decoder with adaptive comb filter and component video input
封裝： SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù)： 62/175頁
文件大小： 898K
代理商： SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
62 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
8.6.1
Scaler output formatter (subaddresses 93h and C3h)
The output formatter organizes the packing into the output FIFO. The following formats
are available: Y-C
B
-C
R
4 : 2 : 2, Y-C
B
-C
R
4 : 1 : 1, Y-C
B
-C
R
4 : 2 : 0, Y-C
B
-C
R
4 : 1 : 0 and
Yonly (e.g. for raw samples). The formatting is controlled by FSI[2:0] 93h[2:0], FOI[1:0]
93h[4:3] and FYSK[93h[5]].
The data formats are defined on double words, or multiples, and are similar to the video
formats as recommended for PCI multimedia applications (compares to SAA7146A), but
planar formats are not supported.
FSI[2:0] defines the horizontal packing of the data, FOI[1:0] defines how many Yonly lines
are expected, before a Y/C line will be formatted. If FYSK is set to logic 0 preceding Yonly
lines will be skipped, and the output will always start with a Y/C line.
Additionally the output formatter limits the amplitude range of the video data (controlled by
ILLV[85h[5]]); see
Table 18
.
8.6.2
Video FIFO (subaddress 86h)
The video FIFO at the scaler output contains 32 double words. That corresponds to
64 pixels in 16-bit Y-C
B
-C
R
4 : 2 : 2 format. But as the entire scaler can act as a pipeline
buffer, the actual available buffer capacity for the image port is much higher, and can
exceed beyond a video line.
The image port, and the video FIFO, can operate with the video source clock
(synchronous mode) or with an externally provided clock (asynchronous and burst mode),
as appropriate for the VGA controller or attached frame buffer.
The video FIFO provides 4 internal flags, reporting to what extent the FIFO is actually
filled.
Table 16.
Output format
Y-C
B
-C
R
4 : 2 : 2
Y-C
B
-C
R
4 : 1 : 1
Yonly
Byte stream for different output formats
Byte sequence for 8-bit output modes
C
B
0 Y0
C
R
0 Y1
C
B
0 Y0
C
R
0 Y1
Y0
Y1
Y2
C
B
2 Y2
C
B
4 Y2
Y4
C
R
2 Y3
C
R
4 Y3
Y6
C
B
4 Y4
Y4
Y8
C
R
4 Y5
Y6
Y10 Y11 Y12 Y13
C
B
6 Y6
C
B
8 Y8
Y5
Y9
Y7
Y3
Y5
Y7
Table 17.
Name
C
B
n
Yn
C
R
n
Explanation to
Table 16
Explanation
C
B
(B
Y) color difference component, pixel number n = 0, 2, 4 to 718
Y (luminance) component, pixel number n = 0, 1, 2, 3 to 719
C
R
(R
Y) color difference component, pixel number n = 0, 2, 4 to 718
Table 18.
Limit step
ILLV[85h[5]]
Limiting range on I port
Valid range
Decimal value
1 to 254
8 to 247
Suppressed codes (hexadecimal value)
Lower range
00
00 to 07
Hexadecimal value
01 to FE
08 to F7
Upper range
FF
F8 to FF
0
1
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SAF7129AH/V1,557 功能描述:視頻 IC 6 DAC VIDEO ENCODER RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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