參數(shù)資料
型號: SAF7118H
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Multistandard video decoder with adaptive comb filter and component video input
封裝: SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù): 41/175頁
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代理商: SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
41 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
(1) The inactive going edge of the V123 signal indicates whether the field is odd or even. If HREF is active during the falling edge of
V123, the field is ODD (field 1). If HREF is inactive during the falling edge of V123, the field is EVEN. The specific position of the
slope is dependent on the internal processing delay and may change a few clock cycles from version to version.
The control signals listed above are available on pins RTS0, RTS1, XRH and XRV according to
Table 8
.
For further information see
Table 56
,
Table 57
and
Table 58
.
Fig 32. Vertical timing diagram for 50 Hz/625 line systems
mhb540
VGATE
VSTO[8:0] = 134h
VSTA[8:0] = 15h
(a) 1st field
CVBS
ITU counting
single field counting
1
1
2
2
3
3
4
4
5
5
6
6
7
7
...
...
22
22
625
312
624
311
623
310
622
309
23
23
FID
HREF
F_ITU656
V123
(1)
VGATE
CVBS
ITU counting
single field counting
FID
HREF
F_ITU656
V123
(1)
VSTO[8:0] = 134h
VSTA[8:0] = 15h
(b) 2nd field
313
313
314
1
315
2
316
3
317
4
318
5
319
6
...
...
335
22
312
312
311
311
310
310
309
309
336
23
Table 8.
Name
HREF
F_ITU656
V123
VGATE
FID
Control signals
RTS0
X
-
X
X
X
RTS1
X
-
X
X
X
XRH
X
-
-
-
-
XRV
-
X
X
-
-
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