參數(shù)資料
型號: SAF7118H
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Multistandard video decoder with adaptive comb filter and component video input
封裝: SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;SAF7118EH/V1<SOT807-1 (HBGA156)|<<http://www.nxp.com/packages/SOT807-1.html<1<,;
文件頁數(shù): 67/175頁
文件大?。?/td> 898K
代理商: SAF7118H
SAF7118_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 4 July 2008
67 of 175
NXP Semiconductors
SAF7118
Multistandard video decoder with adaptive comb filter
8.7.1
Master audio clock
The audio clock is synthesized from the same crystal frequency as the line-locked video
clock is generated. The master audio clock is defined by the parameters:
Audio master Clocks Per Field, ACPF[17:0] 32h[1:0] 31h[7:0] 30h[7:0] according to
roundaudio frequency
field frequency
the equation:
Audio master Clocks Nominal Increment, ACNI[21:0] 36h[5:0] 35h[7:0] 34h[7:0]
according to the equation:
See
Table 22
for examples.
Remark
: For standard applications the synthesized audio clock AMCLK can be used
directly as master clock and as input clock for port AMXCLK (short cut) to generate
ASCLK and ALRCLK. For high-end applications it is recommended to use an external
analog PLL circuit to enhance the performance of the generated audio clock.
Table 22.
XTALO (MHz)
Programming examples for audio master clock generation
Field (Hz)
ACPF
Decimal
AMCLK = 256
×
48 kHz (12.288 MHz)
32.11
50
245760
59.94
205005
24.576
50
-
59.94
-
AMCLK = 256
×
44.1 kHz (11.2896 MHz)
32.11
50
225792
59.94
188348
24.576
50
225792
59.94
188348
AMCLK = 256
×
32 kHz (8.192 MHz)
32.11
50
163840
59.94
136670
24.576
50
163840
59.94
136670
ACNI
Decimal
Hex
Hex
3 C000
3 20CD
-
-
3210190
3210190
-
-
30 FBCE
30 FBCE
-
-
3 7200
2 DFBC
3 7200
2 DFBC
2949362
2949362
3853517
3853517
2D 00F2
2D 00F2
3A CCCD
3A CCCD
2 8000
2 15DE
2 8000
2 15DE
2140127
2140127
2796203
2796203
20 A7DF
20 A7DF
2A AAAB
2A AAAB
ACPF[17:0]
=
ACNI[21:0]
round
crystal frequency
----------------------------------------
2
23
×
=
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