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參數(shù)資料
| 型號(hào)： | S3C3410XXX-QA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 40 MHz, RISC MICROCONTROLLER, PQFP128 |
| 封裝： | 14 X 20 MM, QFP-128 |
| 文件頁(yè)數(shù)： | 191/314頁(yè) |
| 文件大小： | 1701K |
| 代理商： | S3C3410XXX-QA |
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BASIC TIMER & WATCHDOG TIMER
S3C3410X RISC MICROPROCESSOR
13-2
FUNCTION DESCRIPTION
Interval Timer Function
The primary function of Basic Timer is to measure the elapsed time between events. The standard time interval
is equal to 256 basic timer clock pulses, which is an overflow signal from 8-bit Basic Timer.
The content of 8-bit counter register, BTCNT, increases it content every when a clock signal is detected which
corresponds to the frequency selected by BTCON. The BTCNT continues its counting until an overflow occurs,
i.e., the content reaches to 255. An overflow can cause the BT interrupt pending flag to be set, which signals that
the designated time interval has elapsed. In this case, when an interrupt request is generated, BTCNT is cleared
to all zero, and the counting continues from 00h, again.
Oscillation Stabilization Using Interval Timer Function
Users can use the Basic Timer to have programmable delay time, which is necessary for stabilizing the clock
signal from oscillator circuit after reset or Stop mode release.
When the S3C3410X is in Stop mode, the reset or external interrupt request can wake up the S3C3410X. Please
understand that the oscillator circuit is in disable state when the S3C3410X is in Stop mode. In case of wake-up
by reset, the oscillator should start first. Because the default clock division ratio is Fin / 2^13, the Fin / 2^13 clock
will be fed to the 8-bit Basic Timer. When an overflow occurs from Bit 4 of BTCNT register(Not using 8-bit, but 4-
bit of Basic Timer), this kind of overflow signal can release the clock blocking to CPU. In other word, the normal
clock can be bed to S3C3410X when an overflow of Bit 4 in Basic Timer. In case of wake-up by external interrupt
request, the only difference from reset, is clock division ratio. While we should use the default value of clock
division ratio for the case of wake-up by reset, we use the pre-defined value of clock division ration before
entering Stop mode for the case of wake-up by external interrupt request. In any case, the CPU can resume its
operation when normal clock can be fed to the blocks in S3C3410X.
In summary, please take following sequence for releasing S3C3410X from Stop mode:
1.
When S3C3410X is in Stop mode, the escape from Stop mode can be made by a power-on reset or an
external interrupt. At same time, the oscillator can start its oscillation.
2.
In case of wake-up by power-on reset, the Basic Timer will increase its content(BTCNT) at the rate of Fin /
2^13, which is the default rate of clock division ration. In case of wake-up by external interrupt request, the
Basic Timer will increase its content(BTCNT) at the rate of preset value, which is written before entering into
Stop mode.
3.
The normal clock from oscillator will be delayed to be fed to all logic blocks inside S3C3410X until the 4
th bit
of Basic Timer is generated. It means that user can use the Basic Timer to guarantee the stable clock from
oscillator, i.e., waiting up to stable oscillation.
4.
When the normal clock can be fed to S3C3410X, the S3C3410X can resume the operation.
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相關(guān)代理商/技術(shù)參數(shù) |
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| S3-C3-5V | 制造商:Panasonic Electric Works 功能描述: |
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