參數(shù)資料
型號: S29PL032J65BFI150
廠商: SPANSION LLC
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 65 ns, PBGA56
封裝: 7 X 9 MM, LEAD FREE, FBGA-56
文件頁數(shù): 65/94頁
文件大?。?/td> 949K
代理商: S29PL032J65BFI150
66
S29PL-J
S29PL-J_00_A8 July 29, 2005
Ad van c e
Inf o rmation
After an erase command sequence is written, if all sectors selected for erasing are protected,
DQ6 toggles for approximately 400 s, then returns to reading array data. If not all selected sec-
tors are protected, the Embedded Erase algorithm erases the unprotected sectors, and ignores
the selected sectors that are protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or
is erase-suspended. When the device is actively erasing (that is, the Embedded Erase algorithm
is in progress), DQ6 toggles. When the device enters the Erase Suspend mode, DQ6 stops tog-
gling. However, the system must also use DQ2 to determine which sectors are erasing or
erase-suspended. Alternatively, the system can use DQ7 (see the DQ7: Data# Polling).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after
the program command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embed-
ded Program algorithm is complete.
Table 23 shows the outputs for Toggle Bit I on DQ6. Figure 12 shows the toggle bit algorithm.
Figure 24 in Read Operation Timings shows the toggle bit timing diagrams. Figure 25 shows the
differences between DQ2 and DQ6 in graphical form. See also the DQ2: Toggle Bit II.
Note: The system should recheck the toggle bit even if DQ5 = “1” because the toggle bit may stop toggling as DQ5 changes
to “1.” See the DQ6: Toggle Bit I and DQ2: Toggle Bit II for more information.
Figure 12 Toggle Bit Algorithm
DQ2: Toggle Bit II
The “Toggle Bit II” on DQ2, when used with DQ6, indicates whether a particular sector is actively
erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is
erase-suspended. Toggle Bit II is valid after the rising edge of the final WE# pulse in the com-
mand sequence.
DQ7 = Data?
Yes
No
DQ5 = 1?
No
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data?
START
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