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參數(shù)資料
| 型號： | S29PL032J65BFI150 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 65 ns, PBGA56 |
| 封裝： | 7 X 9 MM, LEAD FREE, FBGA-56 |
| 文件頁數(shù)： | 55/94頁 |
| 文件大小： | 949K |
| 代理商： | S29PL032J65BFI150 |
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July 29, 2005 S29PL-J_00_A8
S29PL-J
57
Advance
Information
Word Program Command Sequence
Programming is a four-bus-cycle operation. The program command sequence is initiated by writ-
ing two unlock write cycles, followed by the program set-up command. The program address and
data are written next, which in turn initiate the Embedded Program algorithm. The system is not
required to provide further controls or timings. The device automatically provides internally gen-
erated program pulses and verifies the programmed cell margin. Table 21 shows the address and
data requirements for the program command sequence. Note that the Secured Silicon Sector,
autoselect, and CFI functions are unavailable when a [program/erase] operation is in progress.
When the Embedded Program algorithm is complete, that bank then returns to the read mode
and addresses are no longer latched. The system can determine the status of the program op-
eration by using DQ7, DQ6, or RY/BY#. Refer to the Write Operation Status section for
information on these status bits.
Any commands written to the device during the Embedded Program Algorithm are ignored. Note
that a hardware reset immediately terminates the program operation. The program command
sequence should be reinitiated once that bank has returned to the read mode, to ensure data
integrity. Note that the Secured Silicon Sector, autoselect and CFI functions are unavailable when
the Secured Silicon Sector is enabled.
Programming is allowed in any sequence and across sector boundaries. A bit cannot be pro-
grammed from “0” back to a “1.” Attempting to do so may cause that bank to set DQ5 = 1,
or cause the DQ7 and DQ6 status bits to indicate the operation was successful. However, a suc-
ceeding read will show that the data is still “0.” Only erase operations can convert a “0” to a “1.”
Unlock Bypass Command Sequence
The unlock bypass feature allows the system to program data to a bank faster than using the
standard program command sequence. The unlock bypass command sequence is initiated by
first writing two unlock cycles. This is followed by a third write cycle containing the unlock bypass
command, 20h. That bank then enters the unlock bypass mode. A two-cycle unlock bypass pro-
gram command sequence is all that is required to program in this mode. The first cycle in this
sequence contains the unlock bypass program command, A0h; the second cycle contains the
program address and data. Additional data is programmed in the same manner. This mode dis-
penses with the initial two unlock cycles required in the standard program command sequence,
resulting in faster total programming time. Table 21 shows the requirements for the command
sequence.
During the unlock bypass mode, only the Unlock Bypass Program and Unlock Bypass Reset com-
mands are valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock
bypass reset command sequence. (See Table 22)
The device offers accelerated program operations through the WP#/ACC pin. When the system
asserts VHH on the WP#/ACC pin, the device automatically enters the Unlock Bypass mode. The
system may then write the two-cycle Unlock Bypass program command sequence. The device
uses the higher voltage on the WP#/ACC pin to accelerate the operation. Note that the WP#/ACC
pin must not be at VHH any operation other than accelerated programming, or device damage
may result. In addition, the WP#/ACC pin must not be left floating or unconnected; inconsistent
behavior of the device may result.
9 illustrates the algorithm for the program operation. Refer to the Erase/Program Operations
table in the AC Characteristics section for parameters, and Figure 19 for timing diagrams.
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| S29PL032J70BAI120 | 功能描述:閃存 32Mb 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BAI122 | 功能描述:閃存 32MB 閃存 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BAW120 | 功能描述:閃存 32MB 閃存 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BFI120 | 功能描述:閃存 32Mb 3V 70ns Parallel NOR 閃存 RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| S29PL032J70BFI120(E) | 制造商:Spansion 功能描述:Cut Tape |
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